scholarly journals Designs protracted to combinational and sequential circuits by using hybrid MOS transistor with memristor

2021 ◽  
Vol 8 (85) ◽  
Author(s):  
V Keerthy Rai ◽  
Sakthivel R
Keyword(s):  
Sequential Circuits ◽  
Mos Transistor ◽  
Combinational And Sequential Circuits

Design of a novel quantum reversible ternary up-counter

2015 ◽  
Vol 13 (05) ◽  
pp. 1550038 ◽  
Author(s):  
Pouran Houshmand ◽  
Majid Haghparast
Keyword(s):  
Power Dissipation ◽  
Reversible Logic ◽  
Sequential Circuits ◽  
Utilization Rate ◽  
Time And Space ◽  
Space Utilization ◽  
Flip Flop ◽  
New Approach ◽  
Combinational And Sequential Circuits ◽  
Better Than

Reversible logic has been recently considered as an interesting and important issue in designing combinational and sequential circuits. The combination of reversible logic and multi-valued logic can improve power dissipation, time and space utilization rate of designed circuits. Only few works have been reported about sequential reversible circuits and almost there are no paper exhibited about quantum ternary reversible counter. In this paper, first we designed 2-qutrit and 3-qutrit quantum reversible ternary up-counters using quantum ternary reversible T-flip-flop and quantum reversible ternary gates. Then we proposed generalized quantum reversible ternary n-qutrit up-counter. We also introduced a new approach for designing any type of n-qutrit ternary and reversible counter. According to the results, we can conclude that applying second approach quantum reversible ternary up-counter is better than the others.

Design of One-Bit Magnitude Comparator using Photonic Crystals

2019 ◽  
Vol 40 (4) ◽  
pp. 363-367 ◽  
Author(s):  
Sapna Rathi ◽  
Sandip Swarnakar ◽  
Santosh Kumar
Keyword(s):  
Photonic Crystals ◽  
Finite Difference Time Domain ◽  
Lattice Structure ◽  
Sequential Circuits ◽  
Nonlinear Material ◽  
Time Domain Simulation ◽  
Matlab Simulation ◽  
All Optical ◽  
Combinational And Sequential Circuits ◽  
Difference Time

Abstract At present, photonic crystals (PhCs) are used to design various combinational and sequential circuits. In this paper, an all-optical one-bit magnitude comparator is proposed using PhC waveguide without using nonlinear material. It is based on beam interference principle, using T-shaped lattice with silicon dielectric rods in air background. It is demonstrated through finite-difference time-domain simulation and verified numerically using MATLAB simulation. The size of PhC lattice structure can be as small as 19.167a×19.167a, where ‘a’ is the lattice constant of the PhC.

scholarly journals A Novel Probability-Based Logic-Locking Technique: ProbLock

Sensors ◽  
2021 ◽  
Vol 21 (23) ◽  
pp. 8126
Author(s):  
Michael Yue ◽  
Sara Tehranipoor
Keyword(s):  
Integrated Circuit ◽  
Selection Process ◽  
Sequential Circuits ◽  
Logic Locking ◽  
Combinational And Sequential Circuits ◽  
Obfuscation Technique

Integrated circuit (IC) piracy and overproduction are serious issues that threaten the security and integrity of a system. Logic locking is a type of hardware obfuscation technique where additional key gates are inserted into the circuit. Only the correct key can unlock the functionality of that circuit; otherwise, the system produces the wrong output. In an effort to hinder these threats on ICs, we have developed a probability-based logic-locking technique to protect the design of a circuit. Our proposed technique, called “ProbLock”, can be applied to both combinational and sequential circuits through a critical selection process. We used a filtering process to select the best location of key gates based on various constraints. Each step in the filtering process generates a subset of nodes for each constraint. We also analyzed the correlation between each constraint and adjusted the strength of the constraints before inserting key gates. We tested our algorithm on 40 benchmarks from the ISCAS ’85 and ISCAS ’89 suites. We evaluated ProbLock against a SAT attack and measured how long the attack took to successfully generate a key value. The SAT attack took longer for most benchmarks using ProbLock which proves viable security in hardware obfuscation.

Sign in / Sign up

Export Citation Format

Share Document