scholarly journals Slope Compensation Design for a Peak Current-Mode Controlled Boost-Flyback Converter

Author(s):  
Juan-Guillermo Muñoz ◽  
Guillermo Gallo ◽  
Fabiola Angulo ◽  
Gustavo Osorio

Power converters with coupled inductors are very promising due to the high efficiency and high voltage gain. Apart from the aforementioned advantages, the boost-flyback converter reduces the voltage stress on the semiconductors. However, to obtain good performance with high voltage gains, the controller must include two control loops (current and voltage), and a compensation ramp. One of the most used control techniques for power converters is the peak current-mode control with compensation ramp. However, in the case of a boost-flyback converter there is no mathematical expression in the literature, to compute the slope of the compensation ramp. In this paper, a formula to compute the slope of the compensation ramp is proposed in such a way that a stable period-1 orbit is obtained. This formula is based on the values of the circuit parameters, such as inductances, capacitances, input voltage, switching frequency and includes some assumptions related to internal resistances, output voltages, and some other electrical properties related with the physical construction of the circuit. The formula is verified numerically using the saltation matrix and experimentally using a test circuit.

Energies ◽  
2018 ◽  
Vol 11 (11) ◽  
pp. 3000 ◽  
Author(s):  
Juan-Guillermo Muñoz ◽  
Guillermo Gallo ◽  
Fabiola Angulo ◽  
Gustavo Osorio

Peak current-mode control is widely used in power converters and involves the use of an external compensation ramp to suppress undesired behaviors and to enhance the stability range of the Period-1 orbit. A boost converter uses an analytical expression to find a compensation ramp; however, other more complex converters do not use such an expression, and the corresponding compensation ramp must be computed using complex mechanisms. A boost-flyback converter is a power converter with coupled inductors. In addition to its high efficiency and high voltage gains, this converter reduces voltage stress acting on semiconductor devices and thus offers many benefits as a converter. This paper presents an analytical expression for computing the value of a compensation ramp for a peak current-mode controlled boost-flyback converter using its simplified model. Formula results are compared to analytical results based on a monodromy matrix with numerical results using bifurcations diagrams and with experimental results using a lab prototype of 100 W.


2016 ◽  
Vol 25 (11) ◽  
pp. 1650136 ◽  
Author(s):  
Zhaohan Li ◽  
Yongcheng Ji ◽  
Shu Yang ◽  
Yuchun Chang

This paper proposes a high-voltage high-efficiency peak-current-mode asynchronous DC–DC step-down converter operating with dual operation modes. The asynchronous buck converter achieves higher efficiency in light load condition compared to synchronous buck converters. Furthermore, the proposed buck converter switches operation mode automatically from pulse-width modulation (PWM) mode to pulse-skipping mode (PSM). By reducing power MOS on-state resistance and optimizing rise/fall time of switches, the proposed buck converter also obtains high efficiency under heavy load condition. The maximum efficiency of the proposed buck converter is 92.9%, implemented with 0.35[Formula: see text][Formula: see text]m BCDMOS 2P3M process, and the total size is 1.1[Formula: see text] 1.2[Formula: see text]mm2. The input range and output range of the converter are 6–30 V, and ([Formula: see text]–3) V, respectively, with the maximum output current of 3 A. Moreover, its built-in current loop leads to good transient response characteristics. Therefore, it can be used widely in communication system and 12 V/24 V distributed power system.


Energies ◽  
2019 ◽  
Vol 12 (11) ◽  
pp. 2066 ◽  
Author(s):  
Cristian Pesce ◽  
Javier Riedemann ◽  
Ruben Pena ◽  
Werner Jara ◽  
Camilo Maury ◽  
...  

The research on DC-DC power converters has been a matter of interest for years since this type of converter can be used in a wide range of applications. The main research is focused on increasing the converter voltage gain while obtaining a good efficiency and reliability. Among the different DC-DC converters, the flyback topology is well-known and widely used. In this paper, a novel high efficiency modified step-up DC-DC flyback converter is presented. The converter is based on a N-stages flyback converter with parallel connected inputs and series-connected outputs. The use of a single main diode and output capacitor reduces the number of passive elements and allows for a more economical implementation compared with interleaved flyback topologies. High efficiency is obtained by including an active snubber circuit, which returns the energy stored in the leakage inductance of the flyback transformers back to the input power supply. A 4.7 kW laboratory prototype is implemented considering four flyback stages with an input voltage of 96 V and an output voltage of 590 V, obtaining an efficiency of 95%. The converter operates in discontinuous current mode then facilitating the output voltage controller design. Experimental results are presented and discussed.


Author(s):  
G.Vijaykumar and Dr.V.Geetha

A high voltage gain modified SEPIC converter is proposed in this paper. This proposed converter has many advantages i.e., high output voltage, lower voltage stress, high efficiency, voltage gain is high without any coupled inductor and transformer, continuous input current. Thus, there is no overshoot voltage at turn-off process for switches. By using single switches, the CCM mode operation can be easily controlled by this converter, so control system is simple and also wide output values is obtained only by modifying the duty cycle. This modified converter has lower components than conventional converter. The operating modes and design of modified converter are discussed. The output power of this converter is 6 watts. By this converter, this converter capable of developing the two and half times of input voltage. The PV system also used this converter to develop high voltage gain. This high voltage gain is achieved by using MATLAB/SIMULIMK platform.


2021 ◽  
pp. 21-27
Author(s):  
Sergey I. Volskiy ◽  
◽  
Yuri Yu. SKOROKHOD ◽  
Nikolay Echkilev ◽  
◽  
...  

The high-voltage converter with the input voltage of 3000 V DC is considered for use as a power supply for auxiliary circuits of commuter electric trains and passenger cars that are used on Russian railways. The limitations on the use of semiconductor devices in converters with an input voltage of 3000 V are shown. The power electrical circuits of the input units of the considered high-voltage converters are shown when using of 1700 and 6500 V IGBT. The expressions for calculating the power losses and the algorithm for selecting the switching frequency of 6500 in IGBT are given. This article is of interest to developers of high-voltage DC converters with an input voltage of 3000 V and higher, which choose IGBT for the power circuit of input units with using the high frequency principle of the electrical energy transformation.


2013 ◽  
Vol 3 (1) ◽  
pp. 5-11 ◽  
Author(s):  
Yuriy Denisov ◽  
Serhii Stepenko

Abstract The problems, devoted to power quality and particularly power factor correction, are of great importance nowadays. The key requirements, which should be satisfied according to the energy efficiency paradigm, are not limited only by high quality of the output voltage (low total harmonic distortion), but also assume minimal power losses (high efficiency) in the power factor corrector (PFC). It could be satisfied by the use of quasi-resonant pulse converter (QRPC) due to its high efficiency at high switching frequency instead of the classical pulse-width modulated (PWM) boost converter. A dynamic model of QRPC with zero current switching (ZCS) is proposed. This model takes into account the main features of QRPC-ZCS as a link of a PFC closed-loop system (discreteness, sharp changes of parameters over switching period, input voltage impact on the gain). The synthesized model is also valid for conventional parallel pulse converter over an active interval of commutation. The regulator for current loop of PFC was synthesized based on digital filter using proposed model by the criterion of fast acting.


2013 ◽  
Vol 311 ◽  
pp. 255-260
Author(s):  
Kun Fang ◽  
Yao Sheng Lu ◽  
Fei Yu

Using CSMC 0.5μm process model, a Step-Down DC-DC converter ASIC applied to portable electronic products was designed. The peak current-mode control PWM with slope compensation was adopted in the power management chip to improve the dynamic response speed of the system; the error amplifier and PWM comparator was redesigned to improve the response speed and stability of the chip; the over-current protection function was included in the peak current sampling circuit; in addition, the circuit with the pulse-skipping mode reduce the battery energy loss. Capable of delivering 600mA Output Current over a wide input voltage range from 3.1 to 5.5V, the ASIC, that has a fixed operation frequency of 800kHz and 95% conversion efficiency, is ideally suited for portable electronic products. No external Schottky diode is required in practical application.


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