scholarly journals Design automation of ΔΣ switched capacitor modulators using spice and MATLAB

2014 ◽  
Vol 11 (1) ◽  
pp. 47-59
Author(s):  
Dejan Mirkovic ◽  
Predrag Petkovic

Concerning the fact that the design of contemporary integrated circuits (IC) is practically impossible without using sophisticated Electronic Design Automation (EDA) software, this paper gives some interesting thoughts and considerations about that issue. As technology processes advances on year basis consequently EDA industry is forced to follow this trend as well. This, on the other hand, requires IC designer to frequently and efficiently accommodate to new working environments. Authors of this paper suggest a method for high level circuit analysis that is based on using common (open source or low cost) circuit simulators but precise and fast enough to meet requirements imposed by demanding mixed-signal blocks. The paper demonstrates the proposed EDA procedure on an example of second order ?? modulator design. It illustrates considerable simulation time saving which is more than welcome in a world of analogue and mixed-signal design.

Author(s):  
Julio L. da Silva ◽  
Emerson Camargo ◽  
Douglas Foster ◽  
Sandro T. Coelho ◽  
Antonio G. de Oliveira ◽  
...  

2003 ◽  
Vol 12 (03) ◽  
pp. 261-303 ◽  
Author(s):  
Paul Le Guernic ◽  
Jean-Pierre Talpin ◽  
Jean-Christophe Le Lann

Rising complexities and performances of integrated circuits and systems, shortening time-to-market demands for electronic equipments, growing installed bases of intellectual property (IP), requirements for adapting existing IP blocks with new services, all stress high-level design as a prominent research topic and call for the development of appropriate methodological solutions. In this aim, system design based on the so-called "synchronous hypothesis" consists of abstracting the nonfunctional implementation details of a system and lets one benefit from a focused reasoning on the logics behind the instants at which the system functionalities should be secured. With this point of view, synchronous design models and languages provide intuitive (ontological) models for integrated circuits. This affinity explains the ease of generating synchronous circuits and verify their functionalities using compilers and related tools that implement this approach. In the relational mathematical model behind the design language SIGNAL, this affinity goes beyond the domain of purely synchronous circuits, and embraces the context of complex architectures consisting of synchronous circuits and desynchronization protocols: globally asynchronous and locally synchronous architectures (GALS). The unique features of the relational model behind SIGNAL are to provide the notion of polychrony: the capability to describe circuits and systems with several clocks; and to support refinement: the ability to assist and support system design from the early stages of requirement specification, to the later stages of synthesis and deployment. The SIGNAL model provides a design methodology that forms a continuum from synchrony to asynchrony, from specification to implementation, from abstraction to concretization, from interfaces to implementations. SIGNAL gives the opportunity to seamlessly model circuits and devices at multiple levels of abstractions, by implementing mechanisms found in many hardware simulators, while reasoning within a simple and formally defined mathematical model. In the same manner, the flexibility inherent to the abstract notion of signal, handled in the synchronous-desynchronized design model of SIGNAL, invites and favors the design of correct by construction systems by means of well-defined transformations of system specifications (morphisms) that preserve the intended semantics and stated properties of the architecture under design. The aim of the present article is to review and summarize these formal, correct-by-construction, design transformations. Most of them are implemented in the POLYCHRONY tool-set, allowing for a mixed bottom–up and top–down design of an embedded hardware–software system using the SIGNAL design language.


Author(s):  
T. Kolasa ◽  
J. C. De La Torre ◽  
L. Bertram

Abstract In this paper, we will present our solution to the problem of test based fault localization in the failure analysis laboratory environment. The test system described herein is currently used for a number of high power mixed signal application specific integrated circuits (ASICs) that incorporate functions including switching power supplies, charge pumps, high current drivers, precision references, ADCs/DACs, comparator circuits, and digital cores. The solution addresses the shortcomings of alternative options through modular construction, compact size, and use of a commercially available graphical software compiler to create the control code and graphical user interface (GUI).


2021 ◽  
Author(s):  
Juzheng Liu ◽  
Shiyu Su ◽  
Meghna Madhusudan ◽  
Mohsen Hassanpourghadi ◽  
Samuel Saunders ◽  
...  

2019 ◽  
Vol 9 (8) ◽  
pp. 1588 ◽  
Author(s):  
Francisco M. Soares ◽  
Moritz Baier ◽  
Tom Gaertner ◽  
Norbert Grote ◽  
Martin Moehrle ◽  
...  

This paper describes a fabrication process for realizing Indium-Phosphide-based photonic-integrated circuits (PICs) with a high level of integration to target a wide variety of optical applications. To show the diversity in PICs achievable with our open-access foundry process, we illustrate two examples: a fully-integrated 20 Gb/s dual-polarization electro-absorption-modulated laser, and a balanced detector composed of avalanche photodiodes for detection of 28 Gb/s optical signals. On another note, datacenters are increasingly relying on hybrid integration of PICs from different technology platforms to increase transmission capacity, while simultaneously lowering cost, size, and power consumption. Several technology platforms require surface coupling rather than the traditional edge coupling to couple the light from one PIC to another. To accommodate the surface-coupling approach in our integration platform, we have developed a strategy to transfer the following optical Input/Output devices into our fabrication process: grating couplers, and vertical mirrors. In addition, we introduced etched facets into the process to improve the usability of our edge-coupling elements. We believe that the additional flexibility in Input/Output interfacing combined with the integration of multiple devices onto one PIC to reduce the number of PIC-to-PIC alignments can contribute significantly to the development of compact, low-cost, and high-performance datacenter modules.


Author(s):  
I. A. Umnyagina ◽  
L. A. Strakhova ◽  
T. V. Blinova

In the blood serum of 70% individuals exposed to harmful factors of the working environment, a high level of oxidative stress and the DNA damage marker 8-Hydroxy-2’-Deoxyguanosine (8-OHdG) were detected.


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