Removal of Methylene Blue by Activated Glass Foams with TiO2 in Dark and Simulated Solar Light

AbstractThe effect of germanium trapezoidal profile shape on the direct current (DC) current gain (βF), cut-off frequency (fT) and maximum oscillation frequency (fMAX) of silicon-germanium (SiGe) hetero-junction bipolar transistors (HBTs) has been investigated. The energy balance (EB), hydrodynamic (HD) and drift-diffusion (DD) physical transport models in SILVACO technology computer aided design (T-CAD) simulator were used. It was found that the current gain values using energy balance model are higher than hydrodynamic and much higher than those corresponding to drift-diffusion. Moreover, decreasing the germanium gradient slope towards the collector side of the base enhances the maximum oscillation frequencies using HD and EB models whilst, they remain stable for DD model.

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Germanium Gradient Optimization for High-Speed Silicon Germanium Hetero-Junction Bipolar Transistors

Annals of West University of Timisoara - Physics ◽

10.2478/awutp-2019-0002 ◽

2019 ◽

Vol 61 (1) ◽

pp. 22-32

Author(s):

Abdelkader Khadir ◽

Nouredine Sengouga ◽

Mohamed Kamel Abdelhafidi

Keyword(s):

Energy Balance ◽

Silicon Germanium ◽

Computer Aided Design ◽

High Speed ◽

Bipolar Transistors ◽

Current Gain ◽

Balance Model ◽

Drift Diffusion ◽

Oscillation Frequencies ◽

Aided Design

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50–200 GHz Silicon–Germanium Heterojunction Bipolar Transistor BICMOS Technology and a Computer-Aided Design Environment for 2–50+ GHz Very Large-Scale Integration Mixed-Signal ICs

Japanese Journal of Applied Physics ◽

10.1143/jjap.41.1111 ◽

2002 ◽

Vol 41 (Part 1, No. 2B) ◽

pp. 1111-1123 ◽

Cited By ~ 1

Author(s):

Seshadri Subbanna ◽

Gregory Freeman ◽

Jae-Sung Rieh ◽

David Ahlgren ◽

Kenneth Stein ◽

...

Keyword(s):

Silicon Germanium ◽

Computer Aided Design ◽

Large Scale ◽

Heterojunction Bipolar Transistor ◽

Design Environment ◽

Bicmos Technology ◽

Computer Aided ◽

Large Scale Integration ◽

Scale Integration ◽

Aided Design

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COMPARISON OF TWO-VALLEY HYDRODYNAMIC MODEL IN BULK SiC AND ZnO MATERIALS

Modern Physics Letters B ◽

10.1142/s0217984909020916 ◽

2009 ◽

Vol 23 (23) ◽

pp. 2807-2818 ◽

Cited By ~ 1

Author(s):

H. ARABSHAHI ◽

REZAEE ROKN-ABADI ◽

S. GOLAFROZ

Keyword(s):

Energy Balance ◽

Hydrodynamic Model ◽

Energy Balance Model ◽

Balance Model ◽

Future Research ◽

Hydrodynamic Models ◽

Drift Diffusion ◽

Transport Models ◽

Inertia Effects ◽

Zno Semiconductor

This report reviews the feasibility of two-dimensional hydrodynamic models in bulk SiC and ZnO semiconductor materials. Although the single-gas hydrodynamic model is superior to the drift-diffusion or energy balance model, it is desirable to direct the efforts of future research in the direction of multi-valley hydrodynamic models. The hydrodynamic model is able to describe inertia effects which play an increasing role in different fields of micro and optoelectronics where simplified charge transport models like the drift-diffusion model and the energy balance model are no longer applicable. Results of extensive numerical simulations are shown for SiC and ZnO materials, which are in fair agreement with other theoretical or experimental methods.

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Improving ESD Protection Robustness Using SiGe Source/Drain Regions in Tunnel FET

Micromachines ◽

10.3390/mi9120657 ◽

2018 ◽

Vol 9 (12) ◽

pp. 657 ◽

Cited By ~ 3

Author(s):

Zhaonian Yang ◽

Yuan Yang ◽

Ningmei Yu ◽

Juin Liou

Keyword(s):

Silicon Germanium ◽

Computer Aided Design ◽

Advanced Technology ◽

Tunnel Fet ◽

Esd Protection ◽

Protection Devices ◽

Effect Transistor ◽

Tunnel Field Effect Transistor ◽

Aided Design ◽

Tcad Simulations

Currently, a tunnel field-effect transistor (TFET) is being considered as a suitable electrostatic discharge (ESD) protection device in advanced technology. In addition, silicon-germanium (SiGe) engineering is shown to improve the performance of TFET-based ESD protection devices. In this paper, a new TFET with SiGe source/drain (S/D) regions is proposed, and its ESD characteristics are evaluated using technology computer aided design (TCAD) simulations. Under a transmission line pulsing (TLP) stressing condition, the triggering voltage of the SiGe S/D TFET is reduced by 35% and the failure current is increased by 17% in comparison with the conventional Si S/D TFET. Physical insights relevant to the ESD enhancement of the SiGe S/D TFET are provided and discussed.

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InAlGaN/GaN with AlGaN back-barrier HEMT technology on SiC for Ka-band applications

International Journal of Microwave and Wireless Technologies ◽

10.1017/s175907871700112x ◽

2017 ◽

Vol 10 (1) ◽

pp. 39-46

Author(s):

Stéphane Piotrowicz ◽

Jean-Claude Jacquet ◽

Piero Gamarra ◽

Olivier Patard ◽

Christian Dua ◽

...

Keyword(s):

Computer Aided Design ◽

Positive Impact ◽

Operating Conditions ◽

Current Gain ◽

Power Measurements ◽

Aided Design ◽

Load Pull ◽

Buffer Structure ◽

A Current ◽

Improved Characteristics

This paper presents performances achieved with InAlGaN/GaN HEMTs with 0.15 µm gate length on SiC substrate. Technology Computer Aided Design simulations were used to optimize the heterostructure. Special attention was paid to the design of the buffer structure. I-V measurements with DC and pulsed bias voltages were performed. CW measurements at millimeter waves were also carried out and are detailed in the following sections. The technology, optimized for power applications up to 45 GHz, demonstrates a current gain cut-off frequency FTof 70 GHz and a maximum available gain cut-off frequency FMAGof 140 GHz. CW Load-pull power measurements at 30 GHz enable to achieve a maximum PAE of 41% associated with an output power density of 3.5 W/mm when biased at VDS= 20 V. These devices, with an improved buffer structure show, reduced recovery time in pulsed operating conditions. These improved characteristics should have a positive impact for pulsed or modulated signal applications.

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Design & Optimization of Gate-All-Around Tunnel FET for Low Power Applications

International Journal of Engineering & Technology ◽

10.14419/ijet.v7i4.12352 ◽

2018 ◽

Vol 7 (4) ◽

pp. 2263

Author(s):

Umesh Dutta ◽

M K. Soni ◽

Manisha Pattanaik

Keyword(s):

Low Power ◽

Computer Aided Design ◽

High Performance ◽

Oxide Thickness ◽

Current Gain ◽

Suitable Candidate ◽

Tunnel Fet ◽

Silicon Based ◽

Aided Design ◽

Selection Of

This paper investigates the performance of tri material gate tunnel field effect transistor (TMGTFET) device designed in gate all around (GAA) configuration. The device performance is analyzed by varying various device related parameters like: drain doping, oxide thickness and radius of silicon core. Simulations are performed using technology computer-aided design (TCAD) tool at 60 nm gate length. Simulation results show that the performance of TMGTFET device can be optimized by proper selection of device parameters so as to achieve improvements in the ON current, OFF current, sub-threshold swing and ambipolar current. The silicon based TMGTFET device demonstrates good performance which makes it a suitable candidate for low power applications with ON current of 0.386 µA/µm, average sub-threshold swing of 32.06 mV/decade, maximum current gain cut off frequency of 41.4 GHz and extremely low OFF current value of the order of 10-20A/µm. We have performed the device optimization to boost the ON current and improve the sub-threshold slope in order to make sure that this device configuration becomes suitable for both low power and high performance applications. The proposed hetero dielectric tri material gate tunnel FET device (HD-TFET) designed in gate all around configuration achieves 19.7 times improvement in ON current as compared to TMGTFET device and excellent average sub-threshold swing of 21.2 mV/decade. The maximum unity current gain frequency is also improved by 3 times indicating its potential for deployment in high frequency applications.

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