scholarly journals Integration technologies for chips with 2D materials

2022 ◽  
Author(s):  
David Moss
Keyword(s):  
2D Materials ◽  
Device Fabrication ◽  
Superior Performance ◽  
Material Synthesis ◽  
Diverse Range ◽  
2D Layered Materials ◽  
Integrated Devices ◽  
Low Energy Consumption ◽  
High Scalability ◽  
On Chip

With compact footprint, low energy consumption, high scalability, and mass producibility, chip-scale integrated devices are an indispensable part of modern technological change and development. Recent advances in two-dimensional (2D) layered materials with their unique structures and distinctive properties have motivated their on-chip integration, yielding a variety of functional devices with superior performance and new features. To realize integrated devices incorporating 2D materials, it requires a diverse range of device fabrication techniques, which are of fundamental importance to achieve good performance and high reproducibility. This paper reviews the state-of-art fabrication techniques for the on-chip integration of 2D materials. First, an overview of the material properties and on-chip applications of 2D materials is provided. Second, different approaches used for integrating 2D materials on chips are comprehensively reviewed, which are categorized into material synthesis, on-chip transfer, film patterning, and property tuning / modification. Third, the methods for integrating 2D van der Waals heterostructures are also discussed and summarized. Finally, the current challenges and future perspectives are highlighted.

scholarly journals Fabrication Methods for Integrating 2D Materials

2021 ◽  
Author(s):  
David Moss
Keyword(s):  
2D Materials ◽  
Device Fabrication ◽  
Superior Performance ◽  
Material Synthesis ◽  
Diverse Range ◽  
2D Layered Materials ◽  
Integrated Devices ◽  
Low Energy Consumption ◽  
High Scalability ◽  
On Chip

With compact footprint, low energy consumption, high scalability, and mass producibility, chip-scale integrated devices are an indispensable part of modern technological change and development. Recent advances in two-dimensional (2D) layered materials with their unique structures and distinctive properties have motivated their on-chip integration, yielding a variety of functional devices with superior performance and new features. To realize integrated devices incorporating 2D materials, it requires a diverse range of device fabrication techniques, which are of fundamental importance to achieve good performance and high reproducibility. This paper reviews the state-of-art fabrication techniques for the on-chip integration of 2D materials. First, an overview of the material properties and on-chip applications of 2D materials is provided. Second, different approaches used for integrating 2D materials on chips are comprehensively reviewed, which are categorized into material synthesis, on-chip transfer, film patterning, and property tuning / modification. Third, the methods for integrating 2D van der Waals heterostructures are also discussed and summarized. Finally, the current challenges and future perspectives are highlighted.

scholarly journals Fabrication techniques for the integration of 2D materials

2021 ◽  
Author(s):  
David Moss
Keyword(s):  
2D Materials ◽  
Device Fabrication ◽  
Superior Performance ◽  
Material Synthesis ◽  
Diverse Range ◽  
2D Layered Materials ◽  
Integrated Devices ◽  
Low Energy Consumption ◽  
High Scalability ◽  
On Chip

<p><a>With compact footprint, low energy consumption, high scalability, and mass producibility, chip-scale integrated devices are an indispensable part of modern technological change and development. Recent advances in </a>two-dimensional (2D) layered materials with their unique structures and distinctive properties have motivated their on-chip integration, yielding a variety of functional devices with superior performance and new features. To realize integrated devices incorporating 2D materials, it requires a diverse range of device fabrication techniques, which are of fundamental importance to achieve good performance and high reproducibility. This paper reviews the state-of-art fabrication techniques for the on-chip integration of 2D materials. First, an overview of the material properties and on-chip applications of 2D materials is provided. Second, different approaches used for integrating 2D materials on chips are comprehensively reviewed, which are categorized into material synthesis, on-chip transfer, film patterning, and property tuning / modification. Third, the methods for integrating 2D van der Waals heterostructures are also discussed and summarized. Finally, the current challenges and future perspectives are highlighted.</p> <p><b> </b></p>

scholarly journals Fabrication techniques for the integration of 2D materials

2021 ◽  
Author(s):  
David Moss
Keyword(s):  
2D Materials ◽  
Device Fabrication ◽  
Superior Performance ◽  
Material Synthesis ◽  
Diverse Range ◽  
2D Layered Materials ◽  
Integrated Devices ◽  
Low Energy Consumption ◽  
High Scalability ◽  
On Chip

<p><a>With compact footprint, low energy consumption, high scalability, and mass producibility, chip-scale integrated devices are an indispensable part of modern technological change and development. Recent advances in </a>two-dimensional (2D) layered materials with their unique structures and distinctive properties have motivated their on-chip integration, yielding a variety of functional devices with superior performance and new features. To realize integrated devices incorporating 2D materials, it requires a diverse range of device fabrication techniques, which are of fundamental importance to achieve good performance and high reproducibility. This paper reviews the state-of-art fabrication techniques for the on-chip integration of 2D materials. First, an overview of the material properties and on-chip applications of 2D materials is provided. Second, different approaches used for integrating 2D materials on chips are comprehensively reviewed, which are categorized into material synthesis, on-chip transfer, film patterning, and property tuning / modification. Third, the methods for integrating 2D van der Waals heterostructures are also discussed and summarized. Finally, the current challenges and future perspectives are highlighted.</p> <p><b> </b></p>

scholarly journals Biogenic and Non-Biogenic Waste Utilization in the Synthesis of 2D Materials (Graphene, h-BN, g-C2N) and Their Applications

2021 ◽  
Vol 3 ◽  
Author(s):  
Manish Pratap Singh ◽  
Abhishek Kumar Bhardwaj ◽  
Keval Bharati ◽  
Rahul Pratap Singh ◽  
Sujeet Kumar Chaurasia ◽  
...  
Keyword(s):  
2D Materials ◽  
Waste Utilization ◽  
Waste Materials ◽  
Synthesis Methods ◽  
Synthetic Approach ◽  
Material Synthesis ◽  
2D Layered Materials ◽  
Future Challenges ◽  
Biogenic Waste ◽  
The Cost

There is a significant amount of waste generated which creates a huge environmental issue for humanity/earth and a tremendous number of varieties of resources of a different kind are needed globally. In this context, nanoscience technology has shown its potential ability to solve the above issues and provides realistic applications and devices. The beauty of nanotechnology is its multidisciplinary approach, in which green nanotechnology has been translated to focus on waste materials. Waste materials are generally generated from biogenic (rice husk, dead leaves, waste food, etc.) and non-biogenic (several types of plastics waste, lard oil, etc.) materials produced from municipal or industrial waste. Currently, a large number of efforts have been made to utilize the waste materials for the synthesis of 2D materials in a greener way. This green synthetic approach has two advantages 1) it reduces the cost of synthesis and 2) includes minimal use of hazardous chemicals. Biogenic wastes (contains biomolecules) contain several significant constituents such as co-enzymes, enzymes, proteins, terpenoids, etc. These constituents or biomolecules are known to play an energetic role in the formation of a different variety of 2D materials and hence control the protocols of green synthesis of 2D materials. This review focuses on the exploration of the current understanding of 2D-layered material synthesis methods using waste material produce from biogenic and non-biogenic waste. It also investigates the applications of various 2D-layered materials in perspective with synthesis from waste and future challenges along with their limitations to industrial-scale synthesis.

scholarly journals Development of a Mobile Analytical Chemistry Workstation Using a Silicon Electrochromatography Microchip and Capacitively Coupled Contactless Conductivity Detector

Micromachines ◽  
2021 ◽  
Vol 12 (3) ◽  
pp. 239
Author(s):  
Yineng Wang ◽  
Xi Cao ◽  
Walter Messina ◽  
Anna Hogan ◽  
Justina Ugwah ◽  
...  
Keyword(s):  
Capillary Electrochromatography ◽  
High Efficiency ◽  
Device Fabrication ◽  
Capacitively Coupled ◽  
Packaging Design ◽  
Design And Optimization ◽  
Nanofabrication Technique ◽  
On Chip ◽  
Silicon Based ◽  
Rapid Separations

Capillary electrochromatography (CEC) is a separation technique that hybridizes liquid chromatography (LC) and capillary electrophoresis (CE). The selectivity offered by LC stationary phase results in rapid separations, high efficiency, high selectivity, minimal analyte and buffer consumption. Chip-based CE and CEC separation techniques are also gaining interest, as the microchip can provide precise on-chip control over the experiment. Capacitively coupled contactless conductivity detection (C4D) offers the contactless electrode configuration, and thus is not in contact with the solutions under investigation. This prevents contamination, so it can be easy to use as well as maintain. This study investigated a chip-based CE/CEC with C4D technique, including silicon-based microfluidic device fabrication processes with packaging, design and optimization. It also examined the compatibility of the silicon-based CEC microchip interfaced with C4D. In this paper, the authors demonstrated a nanofabrication technique for a novel microchip electrochromatography (MEC) device, whose capability is to be used as a mobile analytical equipment. This research investigated using samples of potassium ions, sodium ions and aspirin (acetylsalicylic acid).

scholarly journals A Universal Atomic Substitution Conversion Strategy Towards Synthesis of Large-Size Ultrathin Nonlayered Two-Dimensional Materials

2021 ◽  
Vol 13 (1) ◽  
Author(s):  
Mei Zhao ◽  
Sijie Yang ◽  
Kenan Zhang ◽  
Lijie Zhang ◽  
Ping Chen ◽  
...  
Keyword(s):  
Theoretical Calculations ◽  
2D Materials ◽  
Direct Synthesis ◽  
Two Dimensional ◽  
Covalent Bonds ◽  
2D Layered Materials ◽  
Large Size ◽  
Two Dimensional Materials ◽  
Microfabrication Technique ◽  
Atomic Substitution

AbstractNonlayered two-dimensional (2D) materials have attracted increasing attention, due to novel physical properties, unique surface structure, and high compatibility with microfabrication technique. However, owing to the inherent strong covalent bonds, the direct synthesis of 2D planar structure from nonlayered materials, especially for the realization of large-size ultrathin 2D nonlayered materials, is still a huge challenge. Here, a general atomic substitution conversion strategy is proposed to synthesize large-size, ultrathin nonlayered 2D materials. Taking nonlayered CdS as a typical example, large-size ultrathin nonlayered CdS single-crystalline flakes are successfully achieved via a facile low-temperature chemical sulfurization method, where pre-grown layered CdI2 flakes are employed as the precursor via a simple hot plate assisted vertical vapor deposition method. The size and thickness of CdS flakes can be controlled by the CdI2 precursor. The growth mechanism is ascribed to the chemical substitution reaction from I to S atoms between CdI2 and CdS, which has been evidenced by experiments and theoretical calculations. The atomic substitution conversion strategy demonstrates that the existing 2D layered materials can serve as the precursor for difficult-to-synthesize nonlayered 2D materials, providing a bridge between layered and nonlayered materials, meanwhile realizing the fabrication of large-size ultrathin nonlayered 2D materials.

Anapole enhanced on-chip routing of spin-valley photons in 2D materials for silicon integrated optical communication

2021 ◽  
Author(s):  
Qi Yao ◽  
Ya-Qing Bie ◽  
Jianfa Chen ◽  
Jinyang Li ◽  
Feng Li ◽  
...  
Keyword(s):  
Optical Communication ◽  
2D Materials ◽  
Integrated Optical ◽  
On Chip

Effect of Aggregate Size on the Retention of Conventional and Rubberized Chip Seal

2019 ◽  
Author(s):  
Alireza Pourhassan ◽  
Ahmed A. Gheni ◽  
Mohamed A. ElGawady
Keyword(s):  
Impact Load ◽  
Mechanical Energy ◽  
Aggregate Size ◽  
Crumb Rubber ◽  
Superior Performance ◽  
Natural Aggregate ◽  
Modes Of Failure ◽  
Chip Seal ◽  
Chip Size ◽  
On Chip

<p>A common defect of chip seals is chip loss or raveling. The previous studies showed uniform grading of aggregate will enhance the retention ability of the chip seal. Also, it was shown that using crumb rubber as an aggregate will enhance the chip seal behavior including aggregate retention. However, no specific study has been done focusing on the effect of aggregate size for rubber nor natural aggregate. This paper is evaluating the effect of chip size on aggregate retention of both natural and rubber aggregate. Standard and modified Vialit tests, and standard and modified Pennsylvania tests which apply different forms of mechanical energy in different temperature was used to assess the aggregate-binder bond interaction and study the chip seal retention. Test results showed different trends for the effect of size on chip retention under impact load versus dynamic load because of different modes of failure. However, rubber particles showed a superior performance rather than natural aggregate in all cases.</p>

First-principles investigation of copper diffusion barrier performance in defective 2D layered materials

2022 ◽  
Author(s):  
Manareldeen Ahmed ◽  
Yan Li ◽  
Wenchao Chen ◽  
Erping Li
Keyword(s):  
Barrier Layer ◽  
Diffusion Barrier ◽  
First Principles ◽  
Energy Barrier ◽  
2D Materials ◽  
Diffusion Path ◽  
Layered Materials ◽  
Vacancy Defects ◽  
2D Layered Materials ◽  
Barrier Performance

Abstract This paper investigates the diffusion barrier performance of 2D layered materials with pre-existing vacancy defects using first-principles density functional theory. Vacancy defects in 2D materials may give rise to a large amount of Cu accumulation, and consequently, the defect becomes a diffusion path for Cu. Five 2D layered structures are investigated as diffusion barriers for Cu, i.e., graphene with C vacancy, hBN with B/N vacancy, and MoS2 with Mo/2S vacancy. The calculated energy barriers using climbing image - nudged elastic band show that MoS2-V2S has the highest diffusion energy barrier among other 2D layers, followed by hBN-VN and graphene. The obtained energy barrier of Cu on defected layer is found to be proportional to the length of the diffusion path. Moreover, the diffusion of Cu through vacancy defects is found to modulate the electronic structures and magnetic properties of the 2D layer. The charge density difference shows that there exists a considerable charge transfer between Cu and barrier layer as quantified by Bader charge. Given the current need for an ultra-thin diffusion barrier layer, the obtained results contribute to the field of application of 2D materials as Cu diffusion barrier in the presence of mono-vacancy defects.

Sign in / Sign up

Export Citation Format

Share Document