scholarly journals RF CMOS Oscillators Design for autonomous Connected Objects

2019 ◽  
Vol 88 ◽  
pp. 05001
Author(s):  
Fayrouz Haddad ◽  
Wenceslas Rahajandraibe ◽  
Imen Ghorbel

Voltage controlled oscillator (VCO) is an integral part of IoT wireless transceiver components. In this paper, VCOs operating around 2.4 GHz have been designed in CMOS technology. The relation between their components and specifications is studied for their performance optimization. Ultra-low power, less than 270 µW, has been obtained, while performing a frequency tuning range of about 10% between 2.1 and 2.4 GHz. Investigations on phase noise performance have been also achieved.

Electronics ◽  
2021 ◽  
Vol 10 (8) ◽  
pp. 889
Author(s):  
Xiaoying Deng ◽  
Peiqi Tan

An ultra-low-power K-band LC-VCO (voltage-controlled oscillator) with a wide tuning range is proposed in this paper. Based on the current-reuse topology, a dynamic back-gate-biasing technique is utilized to reduce power consumption and increase tuning range. With this technique, small dimension cross-coupled pairs are allowed, reducing parasitic capacitors and power consumption. Implemented in SMIC 55 nm 1P7M CMOS process, the proposed VCO achieves a frequency tuning range of 19.1% from 22.2 GHz to 26.9 GHz, consuming only 1.9 mW–2.1 mW from 1.2 V supply and occupying a core area of 0.043 mm2. The phase noise ranges from −107.1 dBC/HZ to −101.9 dBc/Hz at 1 MHz offset over the whole tuning range, while the total harmonic distortion (THD) and output power achieve −40.6 dB and −2.9 dBm, respectively.


2010 ◽  
Vol 19 (06) ◽  
pp. 1299-1305 ◽  
Author(s):  
XUEPO MA ◽  
WEI ZHANG ◽  
YANG LIU

In this paper, a cross-coupled complementary inductance–capacitance voltage controlled oscillator (LCVCO) with low phase noise and wide tuning range is presented. It has a multi-band topology and was fabricated with RF CMOS technology. For the purpose of lowering the K VCO and reducing the nonlinearities of varactors, the sizes of the varactors are set small. Also noise filtering technique is adopted to minimize up-conversion of the low frequency noise as well as down-conversion of the high frequency noise, thus the phase noise performance of the VCO is greatly improved. Simulation and experimental results indicate that the LCVCO displays a phase noise of -126.1 dBc at 900 kHz offset in worst case with a tuning range from 1.76 to 1.96 GHz.


2011 ◽  
Vol 3 (6) ◽  
pp. 627-631 ◽  
Author(s):  
Paolo Lucchi ◽  
Davide Dermit ◽  
Gilles Jacquemod ◽  
Jean Baptiste Begueret ◽  
Mattia Borgarino

This paper reports a 15 GHz quadrature voltage controlled oscillator (QVCO) designed in a 130 nm CMOS technology. The phase noise performance of the QVCO and of a phase locked loop (PLL) where the QVCO was inserted were compared with the literature and with telecom standards and commercial products for broadcast satellite applications.


Electronics ◽  
2021 ◽  
Vol 10 (14) ◽  
pp. 1686
Author(s):  
Jian Chen ◽  
Wei Zhang ◽  
Qingqing Sun ◽  
Lizheng Liu

This study presents an inductance capacitance (LC) phase-locked loop (PLL) with a dual voltage-controlled oscillator (VCO) and a noise-reduced low-dropout (LDO) regulator, which was used in four-lane multiprotocol serial link applications. The dual VCO architecture can increase the total frequency-tuning range to ensure that the LC PLL achieves multiprotocol serial link coverage from 8 to 12.5 Gbps. Two switch capacitor array-based LC VCOs have a large frequency-tuning range and small VCO gain. The noise-reduced LDO regulator provides a very low-noise power supply to the VCO. The active area occupied by the proposed LC PLL in UMC 28-nm 1P10M complementary metal–oxide–semiconductor (CMOS) technology is 0.25 mm2. The phase noise of the VCO at 1 MHz is −108.1 dBc/Hz. The power consumption of the LC PLL with a 1.8-V supply is 16.5 mW.


2021 ◽  
Vol 12 ◽  
pp. 116-124
Author(s):  
Kruti Thakore ◽  
D. J. Shah ◽  
N. M. Devashrey

This paper presents low phase noise, precise frequency tuning range LC Voltage controlled Oscillator (VCO) circuit of Phase lock loop, to support - IEEE 802.11a/b/g, Bluetooth, Zigbee and IEEE 802.15.4., operating on 2.4GHz ISM band (Industrial, Scientific, Medical). The presented circuit is implemented in Cadence virtuoso environment and using GPDK090 Library of 90nm CMOS Technology. The presented VCO is tuned at 2.4GHz frequency with tuning range of 80MHz. The measured Phase noise is -126.3dBc/Hz at 1MHz offset frequency. The total power consumption of the presented VCO is 4.7mw at 1V power supply.


Electronics ◽  
2021 ◽  
Vol 10 (2) ◽  
pp. 109
Author(s):  
Youming Zhang ◽  
Xusheng Tang ◽  
Zhennan Wei ◽  
Kaiye Bao ◽  
Nan Jiang

This paper presents a Ku-band fractional-N frequency synthesizer with adaptive loop bandwidth control (ALBC) to speed up the lock settling process and meanwhile ensure better phase noise and spur performance. The theoretical analysis and circuits implementation are discussed in detail. Other key modules of the frequency synthesizer such as broadband voltage-controlled oscillator (VCO) with auto frequency calibration (AFC) and programable frequency divider/charge pump/loop filter are designed for integrity and flexible configuration. The proposed frequency synthesizer is fabricated in 0.13 μm CMOS technology occupying 1.14 × 1.18 mm2 area including ESD/IOs and pads, and the area of the ALBC is only 55 × 76 μm2. The out frequency can cover from 11.37 GHz to 14.8 GHz with a frequency tuning range (FTR) of 26.2%. The phase noise is −112.5 dBc/Hz @ 1 MHz and −122.4 dBc/Hz @ 3 MHz at 13 GHz carrier frequency. Thanks to the proposed ALBC, the lock-time can be shortened by about 30% from about 36 μs to 24 μs. The chip area and power consumption of the proposed ALBC technology are slight, but the beneficial effect is significant.


2019 ◽  
Vol 28 (07) ◽  
pp. 1950122 ◽  
Author(s):  
Imen Ghorbel ◽  
Fayrouz Haddad ◽  
Wenceslas Rahajandraibe ◽  
Mourad Loulou

A design methodology of CMOS LC voltage-controlled oscillator (VCO) is proposed in this paper. The relation between components and specifications of the LC-VCO is studied to easily identify its design trade-offs. This methodology has been applied to design ultra-low-power LC-VCOs for different frequency bands. An LC-VCO based on the current reuse technique has been realized with the proposed methodology in 0.13[Formula: see text][Formula: see text]m CMOS process. Measurements present an ultra-low power consumption of only 262[Formula: see text][Formula: see text]W drawn from 1[Formula: see text]V supply voltage. The measured frequency tuning range is about 10% between 2.179[Formula: see text]GHz and 2.409[Formula: see text]GHz. The post-layout simulation presents a phase noise (PN) of [Formula: see text][Formula: see text]dBc/Hz, while the measured PN is [Formula: see text][Formula: see text]dBc/Hz.


2018 ◽  
Vol 10 (7) ◽  
pp. 783-793 ◽  
Author(s):  
Vadim Issakov ◽  
Johannes Rimmelspacher ◽  
Saverio Trotta ◽  
Marc Tiebout ◽  
Amelie Hagelauer ◽  
...  

AbstractWe present a continuously tunable 52-to-67 GHz push–push dual-core voltage-controlled oscillator (VCO) in a 40 nm bulk complementary metal–oxide–semiconductor (CMOS) technology. The circuit is suitable for 60 GHz frequency-modulated-continuous-wave radar applications requiring a continuously tunable ultra-wide modulation bandwidth. The LC-tank inductor is used to couple the two VCO cores. The fundamental frequency of the VCO can be tuned from 26 to 33.5 GHz, which corresponds to a frequency tuning range of 25%. The second harmonic is extracted in a non-invasive way using a transformer. The primary side acts simultaneously as a second harmonic filter. The VCO achieves in measurement a low phase noise of −91.8 dBc/Hz at 1 MHz offset at 62 GHz and an output power of −20 dBm. The VCO including buffers dissipates in the dual-core operation mode 60 mA from a single 1.1 V supply and consumes a chip area of 0.58 mm2.


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