scholarly journals An Automatic Design Framework for Real-Time Power System Simulators Supporting Smart Grid Applications

Electronics ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 299 ◽  
Author(s):  
Eleftherios Mylonas ◽  
Nikolaos Tzanis ◽  
Michael Birbas ◽  
Alexios Birbas
Keyword(s):  
Smart Grid ◽  
Power System ◽  
Real Time ◽  
High Speed ◽  
High Performance ◽  
Power Grids ◽  
Low Latency ◽  
Successful Implementation ◽  
Automatic Design ◽  
Design Framework

Smart grid technology is the next step to the evolution of classical power grids, providing robustness, reliability, and security throughout the network, enabling real-time management and control. To achieve these goals, distributed computing (microgrid concept) and intelligent control algorithms, tailored to the nature and needs of the network under study, are necessary. To deal with the vast diversity of power grids, being able to capture the dynamics of any given network, and create tools for network analysis, apparatus testing, and power grid management, an automatic design framework for real-time power system simulators is needed. In this article, a prototype of this approach is presented, employing Field Programmable Gate Array (FPGA) platforms due to their reconfigurability that enables low-power, low-latency, and high-performance designs, as a first attempt towards an open source platform, compatible with the majority of hardware design suites. It comprises two major parts: (i) a user-oriented section, built in Matlab/Simulink; and (ii) a hardware-oriented section, written in Matlab and Very High Speed Integrated Circuit (VHSIC)-Hardware Description Language (VHDL) code. To verify its functionality, two test power networks were given in a schematic format, analyzed through Matlab code and turned into dedicated hardware simulators with the aid of the VHDL template. Then, simulation results from Simulink and the prototype were compared for error estimation. The results show the prototype’s successful implementation with minimal resources utilization, high performance and low latency in the order of nanoseconds in Xilinx 6- and 7-series FPGAs, therefore proving its modularity and efficient use in many different scenarios, meeting low-latency/real-time requirements while enabling further smart grid research.

scholarly journals A Modified KNN Algorithm for High-Performance Computing on FPGA of Real-Time m-QAM Demodulators

Electronics ◽  
2021 ◽  
Vol 10 (5) ◽  
pp. 627
Author(s):  
David Marquez-Viloria ◽  
Luis Castano-Londono ◽  
Neil Guerrero-Gonzalez
Keyword(s):  
Real Time ◽  
High Performance ◽  
Interference Mitigation ◽  
Parallel Implementation ◽  
Computational Time ◽  
Successful Implementation ◽  
Interchannel Interference ◽  
The Difference ◽  
High Level ◽  
Performance Computing

A methodology for scalable and concurrent real-time implementation of highly recurrent algorithms is presented and experimentally validated using the AWS-FPGA. This paper presents a parallel implementation of a KNN algorithm focused on the m-QAM demodulators using high-level synthesis for fast prototyping, parameterization, and scalability of the design. The proposed design shows the successful implementation of the KNN algorithm for interchannel interference mitigation in a 3 × 16 Gbaud 16-QAM Nyquist WDM system. Additionally, we present a modified version of the KNN algorithm in which comparisons among data symbols are reduced by identifying the closest neighbor using the rule of the 8-connected clusters used for image processing. Real-time implementation of the modified KNN on a Xilinx Virtex UltraScale+ VU9P AWS-FPGA board was compared with the results obtained in previous work using the same data from the same experimental setup but offline DSP using Matlab. The results show that the difference is negligible below FEC limit. Additionally, the modified KNN shows a reduction of operations from 43 percent to 75 percent, depending on the symbol’s position in the constellation, achieving a reduction 47.25% reduction in total computational time for 100 K input symbols processed on 20 parallel cores compared to the KNN algorithm.

Fifty years of Electronic Hardware Implementations of First and Higher Order Neural Networks

2010 ◽  
pp. 269-285 ◽  
Author(s):  
David R. Selviah ◽  
Janti Shawash
Keyword(s):  
Neural Networks ◽  
Real Time ◽  
High Speed ◽  
Higher Order ◽  
Low Latency ◽  
Real Time Control ◽  
Practical Applications ◽  
Field Programmable ◽  
On Chip ◽  
Electronic Hardware

This chapter celebrates 50 years of first and higher order neural network (HONN) implementations in terms of the physical layout and structure of electronic hardware, which offers high speed, low latency, compact, low cost, low power, mass produced systems. Low latency is essential for practical applications in real time control for which software implementations running on CPUs are too slow. The literature review chapter traces the chronological development of electronic neural networks (ENN) discussing selected papers in detail from analog electronic hardware, through probabilistic RAM, generalizing RAM, custom silicon Very Large Scale Integrated (VLSI) circuit, Neuromorphic chips, pulse stream interconnected neurons to Application Specific Integrated circuits (ASICs) and Zero Instruction Set Chips (ZISCs). Reconfigurable Field Programmable Gate Arrays (FPGAs) are given particular attention as the most recent generation incorporate Digital Signal Processing (DSP) units to provide full System on Chip (SoC) capability offering the possibility of real-time, on-line and on-chip learning.

scholarly journals Monitoring and characterization of vibration and shock conditions aboard high-performance marine craft

2018 ◽  
Vol 233 (4) ◽  
pp. 1068-1081
Author(s):  
Manudul Pahansen de Alwis ◽  
Karl Garme
Keyword(s):  
Real Time ◽  
High Speed ◽  
High Performance ◽  
Severity Index ◽  
Irregular Waves ◽  
Vibration Exposure ◽  
Data Set ◽  
Real Time Analysis ◽  
Impact Acceleration ◽  
The Impact

The stochastic environmental conditions together with craft design and operational characteristics make it difficult to predict the vibration environments aboard high-performance marine craft, particularly the risk of impact acceleration events and the shock component of the exposure often being associated with structural failure and human injuries. The different timescales and the magnitudes involved complicate the real-time analysis of vibration and shock conditions aboard these craft. The article introduces a new measure, severity index, indicating the risk of severe impact acceleration, and proposes a method for real-time feedback on the severity of impact exposure together with accumulated vibration exposure. The method analyzes the immediate 60 s of vibration exposure history and computes the severity of impact exposure as for the present state based on severity index. The severity index probes the characteristic of the present acceleration stochastic process, that is, the risk of an upcoming heavy impact, and serves as an alert to the crew. The accumulated vibration exposure, important for mapping and logging the crew exposure, is determined by the ISO 2631:1997 vibration dose value. The severity due to the impact and accumulated vibration exposure is communicated to the crew every second as a color-coded indicator: green, yellow and red, representing low, medium and high, based on defined impact and dose limits. The severity index and feedback method are developed and validated by a data set of 27 three-hour simulations of a planning craft in irregular waves and verified for its feasibility in real-world applications by full-scale acceleration data recorded aboard high-speed planing craft in operation.

scholarly journals High-Speed, High-Performance Real-Time Imaging of Physiological Sarcomere Dynamics in the Beating Mouse Heart in Vivo

2016 ◽  
Vol 110 (3) ◽  
pp. 463a
Author(s):  
Fuyu Kobirumaki-Shimozawa ◽  
Kotaro Oyama ◽  
Togo Shimozawa ◽  
Takashi Ohki ◽  
Takako Terui ◽  
...  
Keyword(s):  
Real Time ◽  
High Speed ◽  
High Performance ◽  
Mouse Heart ◽  
Real Time Imaging ◽  
Sarcomere Dynamics

scholarly journals Advancements in Real-Time Simulation for the Validation of Grid Modernization Technologies

Energies ◽  
2020 ◽  
Vol 13 (16) ◽  
pp. 4036 ◽  
Author(s):  
Kati Sidwall ◽  
Paul Forsyth
Keyword(s):  
Power System ◽  
Real Time ◽  
High Performance ◽  
Ease Of Use ◽  
System Modelling ◽  
Simulation Fidelity ◽  
Real Time Simulation ◽  
Time Simulation ◽  
Working Groups ◽  
Very High

Real-time simulation and hardware-in-the-loop testing have increased in popularity as grid modernization has become more widespread. As the power system has undergone an evolution in the types of generator and load deployed on the system, the penetration and capabilities of automation and monitoring systems, and the structure of the energy market, a corresponding evolution has taken place in the way we model and test power system behavior and equipment. Consequently, emerging requirements for real-time simulators are very high when it comes to simulation fidelity, interfacing options, and ease of use. Ongoing advancements from a processing hardware, graphical user interface, and power system modelling perspective have enabled utilities, manufacturers, educational and research institutions, and consultants to apply real-time simulation to grid modernization projects. This paper summarizes various recent advancements from a particular simulator manufacturer, RTDS Technologies Inc. Many of these advancements have been enabled by growth in the high-performance processing space and the emerging availability of high-end processors for embedded designs. Others have been initiated or supported by developer participation in power industry working groups and study committees.

scholarly journals Real-Time Hardware-in-the-Loop Emulation of High-Speed Rail Power System With SiC-Based Energy Conversion

IEEE Access ◽  
2020 ◽  
Vol 8 ◽  
pp. 122348-122359 ◽  
Author(s):  
Tian Liang ◽  
Qin Liu ◽  
Venkata R. Dinavahi
Keyword(s):  
Power System ◽  
Energy Conversion ◽  
Real Time ◽  
High Speed ◽  
Hardware In The Loop ◽  
High Speed Rail

Big Data Analytics Framework for Real-Time Genome Analysis: A Comprehensive Approach

2019 ◽  
Vol 16 (8) ◽  
pp. 3419-3427
Author(s):  
Shishir K. Shandilya ◽  
S. Sountharrajan ◽  
Smita Shandilya ◽  
E. Suganya
Keyword(s):  
Big Data ◽  
Real Time ◽  
Genome Analysis ◽  
High Speed ◽  
High Performance ◽  
Big Data Analytics ◽  
Good Precision ◽  
Entire Genome ◽  
Big Data Technologies ◽  
Sequencing Platforms

Big Data Technologies are well-accepted in the recent years in bio-medical and genome informatics. They are capable to process gigantic and heterogeneous genome information with good precision and recall. With the quick advancements in computation and storage technologies, the cost of acquiring and processing the genomic data has decreased significantly. The upcoming sequencing platforms will produce vast amount of data, which will imperatively require high-performance systems for on-demand analysis with time-bound efficiency. Recent bio-informatics tools are capable of utilizing the novel features of Hadoop in a more flexible way. In particular, big data technologies such as MapReduce and Hive are able to provide high-speed computational environment for the analysis of petabyte scale datasets. This has attracted the focus of bio-scientists to use the big data applications to automate the entire genome analysis. The proposed framework is designed over MapReduce and Java on extended Hadoop platform to achieve the parallelism of Big Data Analysis. It will assist the bioinformatics community by providing a comprehensive solution for Descriptive, Comparative, Exploratory, Inferential, Predictive and Causal Analysis on Genome data. The proposed framework is user-friendly, fully-customizable, scalable and fit for comprehensive real-time genome analysis from data acquisition till predictive sequence analysis.

scholarly journals Real-time Trajectory Planning for Automated Vehicle Safety and Performance in Dynamic Environments

2021 ◽  
pp. 1-22
Author(s):  
Huckleberry Febbo ◽  
Paramsothy Jayakumar ◽  
Jeffrey L. Stein ◽  
Tulga Ersal
Keyword(s):  
Real Time ◽  
Obstacle Avoidance ◽  
Trajectory Planning ◽  
High Speed ◽  
High Performance ◽  
Simultaneous Optimization ◽  
Problem Solver ◽  
Automated Vehicles ◽  
Control Effort ◽  
Moving Obstacle

Abstract Safe trajectory planning for high-performance automated vehicles in an environment with both static and moving obstacles is a challenging problem. Part of the challenge is developing a formulation that can be solved in real-time while including the following set of specifications: minimum time-to-goal, a dynamic vehicle model, minimum control effort, both static and moving obstacle avoidance, simultaneous optimization of speed and steering, and a short execution horizon. This paper presents a nonlinear model predictive control-based trajectory planning formulation, tailored for a large, high-speed unmanned ground vehicle, that includes the above set of specifications. The ability to solve this formulation in real-time is evaluated using NLOptControl, an open-source, direct-collocation based, optimal control problem solver in conjunction with the KNITRO nonlinear programming problem solver. The formulation is tested with various sets of the specifications. A parametric study relating execution horizon and obstacle speed indicates that the moving obstacle avoidance specification is not needed for safety when the planner has a small execution horizon and the obstacles are moving slowly. However, a moving obstacle avoidance specification is needed when the obstacles are moving faster, and this specification improves the overall safety without, in most cases, increasing the solve-times. The results indicate that (i) safe trajectory planners for high-performance automated vehicles should include the entire set of specifications mentioned above, unless a static or low-speed environment permits a less comprehensive planner; and (ii) the resulting formulation can be solved in real-time.

scholarly journals A real-time fault diagnosis system for high-speed power system protection based on machine learning algorithms

2020 ◽  
Vol 10 (6) ◽  
pp. 6122
Author(s):  
Elmahdi Khoudry ◽  
Abdelaziz Belfqih ◽  
Tayeb Ouaderhman ◽  
Jamal Boukherouaa ◽  
Faissal Elmariami
Keyword(s):  
Machine Learning ◽  
Fault Diagnosis ◽  
Power System ◽  
Real Time ◽  
High Speed ◽  
Learning Algorithms ◽  
Time Estimation ◽  
Machine Learning Algorithms ◽  
Diagnosis System ◽  
Fault Diagnosis System

This paper puts forward a real-time smart fault diagnosis system (SFDS) intended for high-speed protection of power system transmission lines. This system is based on advanced signal processing techniques, traveling wave theory results, and machine learning algorithms. The simulation results show that the SFDS can provide an accurate internal/external fault discrimination, fault inception time estimation, fault type identification, and fault location. This paper presents also the hardware requirements and software implementation of the SFDS.

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