scholarly journals Realization of a Generalized Switched-Capacitor Multilevel Inverter Topology with Less Switch Requirement

Energies ◽  
2020 ◽  
Vol 13 (7) ◽  
pp. 1556 ◽  
Author(s):  
Anzar Ahmad ◽  
MU Anas ◽  
Adil Sarwar ◽  
Mohammad Zaid ◽  
Mohd Tariq ◽  
...  
Keyword(s):  
Output Voltage ◽  
Multilevel Inverter ◽  
Basic Unit ◽  
Modulation Scheme ◽  
Switched Capacitor ◽  
Level Control ◽  
Active Components ◽  
Proposed Model ◽  
Environment Simulation ◽  
The Cost

Conventional multilevel inverter topologies like neutral point clamped (NPC), flying capacitor (FC), and cascade H bridge (CHB) are employed in the industry but require a large number of switches and passive and active components for the generation of a higher number of voltage levels. Consequently, the cost and complexity of the inverter increases. In this work, the basic unit of a switched capacitor topology was generalized utilizing a cascaded H-bridge structure for realizing a switched-capacitor multilevel inverter (SCMLI). The proposed generalized MLI can generate a significant number of output voltage levels with a lower number of components. The operation of symmetric and asymmetric configurations was shown with 13 and 31 level output voltage generation, respectively. Self-capacitor voltage balancing and boosting capability are the key features of the proposed SCMLI structure. The nearest level control modulation scheme was employed for controlling and regulating the output voltage. Based on the longest discharging time, the optimum value of capacitance was also calculated. A generalized formula for the generation of higher voltage levels was also derived. The proposed model was simulated in the MATLAB®/Simulink 2016a environment. Simulation results were validated with the hardware implementation.

scholarly journals A Single Source Switched-Capacitor 13-Level Inverter with Triple Voltage Boosting and Reduced Component Count

Electronics ◽  
2021 ◽  
Vol 10 (19) ◽  
pp. 2321
Author(s):  
Mohammad Tayyab ◽  
Adil Sarwar ◽  
Irfan Khan ◽  
Mohd Tariq ◽  
Md Reyaz Hussan ◽  
...  
Keyword(s):  
Comparative Analysis ◽  
Output Voltage ◽  
Multilevel Inverter ◽  
Switched Capacitor ◽  
Single Source ◽  
Level Control ◽  
Voltage Waveform ◽  
Voltage Level ◽  
Fundamental Cycle ◽  
Simulation Results

A new triple voltage boosting switched-capacitor multilevel inverter (SCMLI) is presented in this paper. It can produce 13-level output voltage waveform by utilizing 12 switches, three diodes, three capacitors, and one DC source. The capacitor voltages are self-balanced as all the three capacitors present in the circuit are connected across the DC source to charge it to the desired voltage level for several instants in one fundamental cycle. A detailed comparative analysis is carried to show the advantages of the proposed topology in terms of the number of switches, number of capacitors, number of sources, total standing voltage (TSV), and boosting of the converter with the recently published 13-level topologies. The nearest level control (NLC)-based algorithm is used for generating switching signals for the IGBTs present in the circuit. The TSV of the proposed converter is 22. Experimental results are obtained for different loading conditions by using a laboratory hardware prototype to validate the simulation results. The efficiency of the proposed inverter is 97.2% for a 200 watt load.

scholarly journals Design and Implementation of a Hybrid Single T-Type Double H-Bridge Multilevel Inverter (STDH-MLI) Topology

Energies ◽  
2019 ◽  
Vol 12 (9) ◽  
pp. 1810 ◽  
Author(s):  
Muhyaddin Rawa ◽  
Marif Daula Siddique ◽  
Saad Mekhilef ◽  
Noraisyah Mohamed Shah ◽  
Hussain Bassi ◽  
...  
Keyword(s):  
Output Voltage ◽  
Detailed Comparison ◽  
Multilevel Inverter ◽  
Basic Unit ◽  
Lower Amount ◽  
Level Control ◽  
Voltage Waveform ◽  
High Quality ◽  
Dc Voltage ◽  
Inverter Topology

Multilevel inverters are proficient in achieving a high-quality staircase output voltage waveform with a lower amount of harmonic content. In this paper, a new hybrid multilevel inverter topology based on the T-type and H-bridge module is presented. The proposed topology aims to achieve a higher number of levels utilizing a lower number of switches, direct current (dc) voltage sources, and voltage stresses across different switches. The basic unit of the proposed single T-type and double H-bridge multilevel inverter (STDH-MLI) produces 15 levels at the output using three dc voltage sources. The proposed topology can be extended by connecting a larger number of dc voltage sources in the T-type section. The nearest level control (NLC) switching technique is used to generate gate pulses for switches to achieve a high-quality output voltage waveform. In addition, a simplified way to achieve NLC is also described in the paper. A detailed comparison with other similar topologies is provided to set the benchmark of the proposed topology. Finally, experimental work is carried out to validate the performance of the proposed topology.

scholarly journals Experimental validation of new self-voltage balanced 9L-ANPC inverter for photovoltaic applications

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
M. Jagabar Sathik ◽  
Dhafer J. Almakhles ◽  
N. Sandeep ◽  
Marif Daula Siddique
Keyword(s):  
Output Voltage ◽  
Pulse Width Modulation ◽  
Superior Performance ◽  
Modulation Scheme ◽  
Switching Frequency ◽  
Switched Capacitor ◽  
Renewable Energy Resources ◽  
High Quality ◽  
Multilevel Inverters ◽  
Blocking Voltage

AbstractMultilevel inverters play an important role in extracting the power from renewable energy resources and delivering the output voltage with high quality to the load. This paper proposes a new single-stage switched capacitor nine-level inverter, which comprises an improved T-type inverter, auxiliary switch, and switched cell unit. The proposed topology effectively reduces the DC-link capacitor voltage and exhibits superior performance over recently switched-capacitor inverter topologies in terms of the number of power components and blocking voltage of the switches. A level-shifted multilevel pulse width modulation scheme with a modified triangular carrier wave is implemented to produce a high-quality stepped output voltage waveform with low switching frequency. The proposed nine-level inverter’s effectiveness, driven by the recommended modulation technique, is experimentally verified under varying load conditions. The power loss and efficiency for the proposed nine-level inverter are thoroughly discussed with different loads.

Performance Evaluation of 3Φ Asymmetrical MLI with Reduced Switch Count

2016 ◽  
Vol 3 (3) ◽  
pp. 671
Author(s):  
Chinnapettai Ramalingam Balamurugan ◽  
S.P. Natarajan ◽  
T.S. Anandhi
Keyword(s):  
Performance Evaluation ◽  
High Power ◽  
Output Voltage ◽  
Multilevel Inverter ◽  
Matlab Simulink ◽  
Ac Drives ◽  
Three Phase ◽  
Multi Level ◽  
The Cost ◽  
Switching Strategies

The multi level inverter system is habitually exploited in AC drives, when both reduced harmonic contents and high power are required. In this paper, a new topology for three phase asymmetrical multilevel inverter employing reduced number of switches is introduced. With less number of switches, the cost, space and weight of the circuit are automatically reduced. This paper discusses the new topology, the switching strategies and the operational principles of the chosen inverter. Simulation is carried out using MATLAB-SIMULINK. Various conventional PWM techniques that are appropriate to the chosen circuit such as PDPWM, PODPWM, APODPWM, VFPWM and COPWM are employed in this work. COPWM technique affords the less THD value and also affords a higher fundamental RMS output voltage.

scholarly journals A New Modular Multilevel Inverter Based on Step-Up Switched-Capacitor Modules

Energies ◽  
2019 ◽  
Vol 12 (3) ◽  
pp. 524 ◽  
Author(s):  
Aryorad Khodaparast ◽  
Erfan Azimi ◽  
Ali Azimi ◽  
M. Ebrahim Adabi ◽  
Jafar Adabi ◽  
...  
Keyword(s):  
Theoretical Investigation ◽  
High Efficiency ◽  
Harmonic Distortion ◽  
Low Frequency ◽  
Multilevel Inverter ◽  
Voltage Source ◽  
Switched Capacitor ◽  
Level Control ◽  
Dc Voltage ◽  
Bipolar Voltage

A new structure of switched capacitor multilevel inverter (SCMLI) capable of voltage boosting and with self-balancing ability is introduced in this article. This advantage is the result of a step by step rise of capacitor voltages in each module, supplied by just one DC voltage source. The proposed topology generates a sinusoidal output waveform with a magnitude several times greater than the input one. Higher output staircase AC voltage is obtained by applying a nearest level control (NLC) modulation technique. The most significant features of this configuration can be mentioned as: fewer semiconductor devices, remarkably low total harmonic distortion (THD), desirable operating under high /low frequency, high efficiency, inherent bipolar voltage production, easy circuit expansion, ease of control and size reduction of the circuit thanks to utilizing neither bulky transformer nor inductor. Moreover, the proposed SCMLI is comprehensively surveyed through theoretical investigation and a comparison of its effectiveness to recent topologies. Eventually, the operating principle of a 25-level prototype of the suggested SCMLI is validated by simulation in the MATLAB SIMULINK environment and experimental results.

scholarly journals Power Quality Improvement in Modular Multilevel Inverter Using for Different Multicarrier PWM

2021 ◽  
Vol 5 (2) ◽  
pp. 19-27
Author(s):  
Thenmalar Kaliannan ◽  
Johny Renoald Albert ◽  
D. Muhamadha Begam ◽  
P. Madhumathi
Keyword(s):  
Power Quality ◽  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Analog Circuit ◽  
Reactive Power ◽  
Pso Algorithm ◽  
Multilevel Inverter ◽  
Modulation Scheme ◽  
Non Linear Load

Pulse width modulation (PWM) is a powerful technique employed in analog circuit convert with a microprocessor based digital output. Besides, Pseudo Random Multi Carrier (PRMC) involves in two random PWM strategies to minimize the harmonic order for 9- level cascaded multilevel H-bridge (CHB) inverter and 9-level Modular Multilevel inverter are introduced. The design mainly focuses on the (Pulse Width Modulation) PWM method, in which two nearest voltage levels are approached in estimated output voltage prediction based on the Partial swarm optimization (PSO) algorithm, and it conveys a random variation in the pulse position of output by Pseudo Random Multi Carrier- Pulse Width Modulation (PRMC-PWM). The CHB and the Modular inverters generate low distortion output by using PMRC. The simulation and prototype circuit are developed for the nine level output using sixteen switches and ten with Resistive-Inductive (R-L) load variation condition. The power quality is improved in CHB and Modular inverter (MoI) with minimized harmonics in various modulation index (MI) as varied from 0.1 up to 0.8. The circuit is designed by using a Field Programmable Gate Array (FPGA), Implementing a PSO algorithm for both CHB, and MoI are proposed. The comparisons of results are verified with lower order harmonics and find the best switching angle across the MLI switches. Modular inverter furthermore investigates with PRMC, Random Nearest level (RNL) modulation scheme are presented, and the proposed circuit is along with the respective degree of the output voltage were synthesized in non-linear load by the development of reactive power across a motor load.

scholarly journals Reliability Analysis and Fault-Tolerant Operation in a Multilevel Inverter for Industrial Application

Electronics ◽  
2021 ◽  
Vol 11 (1) ◽  
pp. 98
Author(s):  
Mohammad Fahad ◽  
Marwan Alsultan ◽  
Shafiq Ahmad ◽  
Adil Sarwar ◽  
Mohd Tariq ◽  
...  
Keyword(s):  
Failure Modes ◽  
Fault Tolerant ◽  
Power Converter ◽  
Open Circuit ◽  
Multilevel Inverter ◽  
Modulation Scheme ◽  
Level Control ◽  
Power Semiconductor ◽  
Harmonic Elimination ◽  
Igbt Modules

The extensive employment of power semiconductor devices in multilevel inverters (MLIs) has the consequence of increased failure probabilities. With numerous applications demanding highly reliable inverters, several fault-tolerant schemes have been devised to address switch open-circuit faults. This paper analyzes a multilevel inverter topology for IGBT modules undergoing open-circuit faults, a major impediment to reliable operation within a power converter. Reconfiguration of modulation is performed post-fault. A modulation scheme is implemented across failure modes as a hybrid of nearest level control and selective harmonic elimination. Reliability assessment of the topology is performed, including a comparison with previous literature in terms of component requirements and reliability. Simulation results validate the proposed solutions.

A New Asymmetric and Cascaded Switched Diode Multilevel Inverter Topology for Reduced Switches, DC Source and Blocked Voltage on Switches

2019 ◽  
Vol 28 (04) ◽  
pp. 1950064 ◽  
Author(s):  
S. A. Ahamed Ibrahim ◽  
P. Anbalagan ◽  
M. A. Jagabar Sathik
Keyword(s):  
High Power ◽  
Output Voltage ◽  
Multilevel Inverter ◽  
Basic Unit ◽  
Prototype Model ◽  
Multilevel Converter ◽  
Multilevel Converters ◽  
Medium Voltage ◽  
Blocking Voltage ◽  
Inverter Topology

In this paper, a new asymmetric switched diode (ASD) multilevel inverter is presented for medium-voltage and high-power applications. The proposed converter consists of series connection basic unit with full-bridge inverter. In addition to this, a cascaded switched diode (CSD) structure is recommended to generate the higher number of voltage levels. Seven different algorithms are presented to determine the magnitudes of DC sources in CSD topology. To prove the advantages of proposed multilevel converter over recent multilevel converters in terms of blocking voltage, numbers of IGBTs and on-state switches are presented. To show the authority of the proposed multilevel inverter, it is simulated using MATLAB/Simulink and is experimentally tested using prototype model for 13-level inverter. Finally, various output voltage and current waveforms are shown to prove the dynamic behavior of proposed inverter.

Sign in / Sign up

Export Citation Format

Share Document