scholarly journals Novel Program Scheme of Vertical NAND Flash Memory for Reduction of Z-Interference

Micromachines ◽  
2021 ◽  
Vol 12 (5) ◽  
pp. 584
Author(s):  
Su-in Yi ◽  
Jungsik Kim

Minimizing the variation in threshold voltage (Vt) of programmed cells is required to the extreme level for realizing multi-level-cells; as many as even 5 bits per cell recently. In this work, a recent program scheme to write the cells from the top, for instance the 170th layer, to the bottom, the 1st layer, (T-B scheme) in vertical NAND (VNAND) Flash Memory, is investigated to minimize Vt variation by reducing Z-interference. With the aid of Technology Computer Aided Design (TCAD) the Z-Interference for T-B (84 mV) is found to be better than B-T (105 mV). Moreover, under scaled cell dimensions (e.g., Lg: 31→24 nm), the improvement becomes protruding (T-B: 126 mV and B-T: 162 mV), emphasizing the significance of the T-B program scheme for the next generation VNAND products with the higher bit density.

Electronics ◽  
2020 ◽  
Vol 9 (11) ◽  
pp. 1775
Author(s):  
Jae-Min Sim ◽  
Myounggon Kang ◽  
Yun-Heub Song

In this paper, we investigated the cell-to-cell interference in scaled-down 3D NAND flash memory by using a Technology Computer-Aided Design (TCAD) simulation. The fundamental cause of cell-to-cell interference is that the electric field crowding point is changed by the programmed adjacent cell so that the electric field is not sufficiently directed to the channel surface. Therefore, the channel concentration of the selected cell is changed, leading to a Vth shift. Furthermore, this phenomenon occurs more severely when the selected cell is in an erased state rather than in a programmed state. In addition, it was confirmed that the cell-to-cell interference by the programmed WLn+1 is more severe than that of WLn−1 due to the degradation of the effective mobility effect. To solve this fundamental problem, a new read scheme is proposed. Through TCAD simulation, the cell-to-cell interference was alleviated with a bias having a ΔV of 1.5 V from Vread through an optimization process to have appropriate bias conditions in three ways that are suitable for each pattern. As a result, this scheme narrowed the Vth shift of 67.5% for erased cells and narrowed the Vth shift of 70% for programmed cells. The proposed scheme is one way to solve the cell-to-cell interference that may occur as the cell-to-cell distance decreases for a high stacked 3D NAND structure.


Author(s):  
Juyoung Lee ◽  
Dong-Gwan Yoon ◽  
Jae-Min Sim ◽  
Yun-Heub Song

The effects of residual stress in a tungsten gate on a polysilicon channel in scaled 3D NAND flash memories were investigated using a technology computer-aided design simulation. The NAND strings with respect to the distance from the tungsten slit were also analyzed. The scaling of the spacer thickness and hole diameter induced compressive stress on the polysilicon channel. Moreover, the residual stress of polysilicon in the string near the tungsten slit had greater compressive stress than the string farther away. The increase in compressive stress in the polysilicon channel degraded the Bit-Line current (Ion) because of stress-induced electron mobility deterioration. Moreover, a threshold voltage shift (△Vth) occurred in the negative direction because of conduction band lowering.


Author(s):  
Juyoung Lee ◽  
Dong-Gwan Yoon ◽  
Jae-Min Sim ◽  
Yun-Heub Song

The effects of residual stress in a tungsten gate on a polysilicon channel in scaled 3D NAND flash memories were investigated using a technology computer-aided design simulation. The NAND strings with respect to the distance from the tungsten slit were also analyzed. The scaling of the spacer thickness and hole diameter induced compressive stress on the polysilicon channel. Moreover, the residual stress of polysilicon in the string near the tungsten slit had greater compressive stress than the string farther away. The increase in compressive stress in the polysilicon channel degraded the Bit-Line current (Ion) because of stress-induced electron mobility deterioration. Moreover, a threshold voltage shift (△Vth) occurred in the negative direction because of conduction band lowering.


Materials ◽  
2021 ◽  
Vol 14 (14) ◽  
pp. 3819
Author(s):  
Ting-Hsun Lan ◽  
Yu-Feng Chen ◽  
Yen-Yun Wang ◽  
Mitch M. C. Chou

The computer-aided design/computer-aided manufacturing (CAD/CAM) fabrication technique has become one of the hottest topics in the dental field. This technology can be applied to fixed partial dentures, removable dentures, and implant prostheses. This study aimed to evaluate the feasibility of NaCaPO4-blended zirconia as a new CAD/CAM material. Eleven different proportional samples of zirconia and NaCaPO4 (xZyN) were prepared and characterized by X-ray diffractometry (XRD) and Vickers microhardness, and the milling property of these new samples was tested via a digital optical microscope. After calcination at 950 °C for 4 h, XRD results showed that the intensity of tetragonal ZrO2 gradually decreased with an increase in the content of NaCaPO4. Furthermore, with the increase in NaCaPO4 content, the sintering became more obvious, which improved the densification of the sintered body and reduced its porosity. Specimens went through milling by a computer numerical control (CNC) machine, and the marginal integrity revealed that being sintered at 1350 °C was better than being sintered at 950 °C. Moreover, 7Z3N showed better marginal fit than that of 6Z4N among thirty-six samples when sintered at 1350 °C (p < 0.05). The milling test results revealed that 7Z3N could be a new CAD/CAM material for dental restoration use in the future.


Author(s):  
Ting Cheng ◽  
Jianquan Jia ◽  
Lei Jin ◽  
Xinlei Jia ◽  
Shiyu Xia ◽  
...  

2007 ◽  
Vol 42 (1) ◽  
pp. 219-232 ◽  
Author(s):  
Ken Takeuchi ◽  
Yasushi Kameda ◽  
Susumu Fujimura ◽  
Hiroyuki Otake ◽  
Koji Hosono ◽  
...  

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