scholarly journals High Pressure Deuterium Passivation of Charge Trapping Layer for Nonvolatile Memory Applications

Micromachines ◽  
2021 ◽  
Vol 12 (11) ◽  
pp. 1316
Author(s):  
Jae-Young Sung ◽  
Jun-Kyo Jeong ◽  
Woon-San Ko ◽  
Jun-Ho Byun ◽  
Hi-Deok Lee ◽  
...  
Keyword(s):  
High Pressure ◽  
Nonvolatile Memory ◽  
Charge Trapping ◽  
Memory Device ◽  
Trap Density ◽  
Flat Band ◽  
Data Retention ◽  
Retention Model ◽  
A Charge ◽  
Memory Applications

In this study, the deuterium passivation effect of silicon nitride (Si3N4) on data retention characteristics is investigated in a Metal-Nitride-Oxide-Silicon (MNOS) memory device. To focus on trap passivation in Si3N4 as a charge trapping layer, deuterium (D2) high pressure annealing (HPA) was applied after Si3N4 deposition. Flat band voltage shifts (ΔVFB) in data retention mode were compared by CV measurement after D2 HPA, which shows that the memory window decreases but charge loss in retention mode after program is suppressed. Trap energy distribution based on thermal activated retention model is extracted to compare the trap density of Si3N4. D2 HPA reduces the amount of trap densities in the band gap range of 1.06–1.18 eV. SIMS profiles are used to analyze the D2 profile in Si3N4. The results show that deuterium diffuses into the Si3N4 and exists up to the Si3N4-SiO2 interface region during post-annealing process, which seems to lower the trap density and improve the memory reliability.

Ga2O3(Gd2O3) as a Charge-Trapping Layer for Nonvolatile Memory Applications

2013 ◽  
Vol 12 (2) ◽  
pp. 157-162 ◽  
Author(s):  
X. D. Huang ◽  
Johnny K. O. Sin ◽  
P. T. Lai
Keyword(s):  
Nonvolatile Memory ◽  
Charge Trapping ◽  
A Charge ◽  
Memory Applications

Unified retention model for localized charge trapping nonvolatile memory device

2008 ◽  
Vol 92 (13) ◽  
pp. 133514 ◽  
Author(s):  
Asia Shapira ◽  
Yael Shur ◽  
Yosi Shacham-Diamand ◽  
Assaf Shappir ◽  
Boaz Eitan
Keyword(s):  
Nonvolatile Memory ◽  
Charge Trapping ◽  
Memory Device ◽  
Retention Model ◽  
Nonvolatile Memory Device

scholarly journals Charge-Trapping Devices Using Multilayered Dielectrics for Nonvolatile Memory Applications

2013 ◽  
Vol 2013 ◽  
pp. 1-5
Author(s):  
Wen-Chieh Shih ◽  
Chih-Hao Cheng ◽  
Joseph Ya-min Lee ◽  
Fu-Chien Chiu
Keyword(s):  
Nonvolatile Memory ◽  
Field Effect Transistors ◽  
Charge Trapping ◽  
Memory Window ◽  
Electrical Characteristics ◽  
Data Retention ◽  
Device Structure ◽  
Threshold Voltage Shift ◽  
Memory Applications ◽  
Trapping Devices

Charge-trapping devices using multilayered dielectrics were studied for nonvolatile memory applications. The device structure is Al/Y2O3/Ta2O5/SiO2/Si (MYTOS). The MYTOS field effect transistors were fabricated using Ta2O5as the charge storage layer and Y2O3as the blocking layer. The electrical characteristics of memory window, program/erase characteristics, and data retention were examined. The memory window is about 1.6 V. Using a pulse voltage of 6 V, a threshold voltage shift of ~1 V can be achieved within 10 ns. The MYTOS transistors can retain a memory window of 0.81 V for 10 years.

Y-Doped BaTiO3 as a Charge-Trapping Layer for Nonvolatile Memory Applications

2016 ◽  
Vol 37 (12) ◽  
pp. 1555-1558 ◽  
Author(s):  
R. P. Shi ◽  
X. D. Huang ◽  
Johnny K. O. Sin ◽  
P. T. Lai
Keyword(s):  
Nonvolatile Memory ◽  
Charge Trapping ◽  
A Charge ◽  
Memory Applications

Novel SONOS-Type Nonvolatile Memory Device With Optimal Al Doping in HfAlO Charge-Trapping Layer

2008 ◽  
Vol 29 (3) ◽  
pp. 265-268 ◽  
Author(s):  
Ping-Hung Tsai ◽  
Kuei-Shu Chang-Liao ◽  
Chu-Yung Liu ◽  
Tien-Ko Wang ◽  
P. J. Tzeng ◽  
...  
Keyword(s):  
Nonvolatile Memory ◽  
Charge Trapping ◽  
Memory Device ◽  
Al Doping ◽  
Nonvolatile Memory Device

scholarly journals Nb2O5 and Ti-Doped Nb2O5 Charge Trapping Nano-Layers Applied in Flash Memory

Nanomaterials ◽  
2018 ◽  
Vol 8 (10) ◽  
pp. 799 ◽  
Author(s):  
Jer Wang ◽  
Chyuan Kao ◽  
Chien Wu ◽  
Chun Lin ◽  
Chih Lin
Keyword(s):  
Flash Memory ◽  
Charge Trapping ◽  
Memory Device ◽  
Dielectric Constants ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Hysteresis Curve ◽  
Band Shift ◽  
K Value ◽  
High K

High-k material charge trapping nano-layers in flash memory applications have faster program/erase speeds and better data retention because of larger conduction band offsets and higher dielectric constants. In addition, Ti-doped high-k materials can improve memory device performance, such as leakage current reduction, k-value enhancement, and breakdown voltage increase. In this study, the structural and electrical properties of different annealing temperatures on the Nb2O5 and Ti-doped Nb2O5(TiNb2O7) materials used as charge-trapping nano-layers in metal-oxide-high k-oxide-semiconductor (MOHOS)-type memory were investigated using X-ray diffraction (XRD) and atomic force microscopy (AFM). Analysis of the C-V hysteresis curve shows that the flat-band shift (∆VFB) window of the TiNb2O7 charge-trapping nano-layer in a memory device can reach as high as 6.06 V. The larger memory window of the TiNb2O7 nano-layer is because of a better electrical and structural performance, compared to the Nb2O5 nano-layer.

scholarly journals Chemical-Vapor-Deposited Graphene as Charge Storage Layer in Flash Memory Device

2016 ◽  
Vol 2016 ◽  
pp. 1-6 ◽  
Author(s):  
W. J. Liu ◽  
L. Chen ◽  
P. Zhou ◽  
Q. Q. Sun ◽  
H. L. Lu ◽  
...  
Keyword(s):  
Flash Memory ◽  
Room Temperature ◽  
Metal Layer ◽  
Chemical Vapor ◽  
Charge Trapping ◽  
Memory Device ◽  
Water Molecules ◽  
Oh Groups ◽  
Chemical Vapor Deposited ◽  
A Charge

We demonstrated a flash memory device with chemical-vapor-deposited graphene as a charge trapping layer. It was found that the average RMS roughness of block oxide on graphene storage layer can be significantly reduced from 5.9 nm to 0.5 nm by inserting a seed metal layer, which was verified by AFM measurements. The memory window is 5.6 V for a dual sweep of ±12 V at room temperature. Moreover, a reduced hysteresis at the low temperature was observed, indicative of water molecules or −OH groups between graphene and dielectric playing an important role in memory windows.

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