scholarly journals Design of a High Performance 4-Bit Ternary Multiplier using CNTFET

2019 ◽  
Vol 9 (2) ◽  
pp. 3106-3111
Keyword(s):  
High Performance ◽  
Field Effect Transistors ◽  
Logic Circuits ◽  
Ternary Logic ◽  
Chip Area ◽  
Binary Logic ◽  
Digital World ◽  
Multiple Valued Logic ◽  
Carbon Nano Tubes ◽  
Carbon Nano Tube

In digital world, digital circuits are influenced by binary logic. Ternary logic which follows the multiple valued logic concept for designing the logic circuits which is an great alternate to the normal binary logic due to its less power consumption and chip area is reduces. Carbon Nano-tube Field-Effect Transistors (CNTFET) is selected to implement the ternary logic circuits due to its mechanical , electrical and thermal properties. The unique feature of CNTFETs has the potential of getting required threshold voltage by varying the diameter of carbon nano-tubes that makes them as a best appropriate type for implementing the ternary logic. In this paper a 4-Bit Ternary Multiplier is designed using 1-Bit ternary multiplier by CNTFET 32nm technology node and simulated in Hspice tool. The proposed 1-Bit multiplier has 10% less delay and 18% less power than the 1-Bit multiplier proposed by Srivasu et al.

A Universal Method for Designing Multi-Digit Ternary to Binary Converter Using CNTFET

2020 ◽  
Vol 29 (12) ◽  
pp. 2050196 ◽  
Author(s):  
Maryam Shahangian ◽  
Seied Ali Hosseini ◽  
Reza Faghih Mirzaee
Keyword(s):  
Threshold Voltage ◽  
High Efficiency ◽  
Field Effect Transistors ◽  
Block Diagram ◽  
Universal Method ◽  
Ternary Logic ◽  
Chip Area ◽  
Binary Logic ◽  
Multiple Valued Logic ◽  
Essential Components

Ternary logic can reduce the number of interconnections, chip area and power dissipation. In addition, one of the important features of carbon nanotube field effect transistors (CNTFETs) is the capability of adjusting threshold voltage. As a result, the design complexity of ternary circuits can be decreased. The structure of a mixed radix system which is based on multi-valued and binary logic is more appropriate compared to only multiple-valued logic (MVL). Therefore, ternary-to-binary and binary-to-ternary converters are the essential components for the ternary signaling on the bus and the binary logic processing circuits. It is also important for the creation of compatibility between the binary and ternary logic. This study is about a multi-digit binary-to-ternary converter by using CNTFET. At first, the algorithm used for the multi-digit conversion from ternary to binary logic is addressed in this paper. Then, the paper proposes a block diagram suitable for designing the multi-digit ternary-to-binary converter. Some new gates including One-Active Gate and Two-Active Gate, as well as two types of binary half-and full-adders, are designed for the purpose of implementing the proposed block diagram. This is done by adjusting the proper threshold voltage for CNTFETs. The proposed algorithm can also be applied to any desired number of bits. The proper operation and high efficiency of the proposed converter are confirmed by HSPICE simulation results and 32[Formula: see text]nm CNTFET technology from the Stanford University.

Systematic Control of Negative Transconductance in Organic Heterojunction Transistor for High‐Performance, Low‐Power Flexible Ternary Logic Circuits

Small ◽  
2021 ◽  
pp. 2103365
Author(s):  
Chungryeol Lee ◽  
Junhwan Choi ◽  
Hongkeun Park ◽  
Changhyeon Lee ◽  
Chang‐Hyun Kim ◽  
...  
Keyword(s):  
Low Power ◽  
High Performance ◽  
Logic Circuits ◽  
Ternary Logic ◽  
Systematic Control ◽  
Heterojunction Transistor

Electromechanical Computing at 500°C with Silicon Carbide

Science ◽  
2010 ◽  
Vol 329 (5997) ◽  
pp. 1316-1318 ◽  
Author(s):  
Te-Hao Lee ◽  
Swarup Bhunia ◽  
Mehran Mehregany
Keyword(s):  
Silicon Carbide ◽  
Thermal Management ◽  
High Performance ◽  
Field Effect Transistors ◽  
Complementary Metal Oxide Semiconductor ◽  
Logic Circuits ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Propulsion Systems ◽  
Heat Sinking

Logic circuits capable of operating at high temperatures can alleviate expensive heat-sinking and thermal-management requirements of modern electronics and are enabling for advanced propulsion systems. Replacing existing complementary metal-oxide semiconductor field-effect transistors with silicon carbide (SiC) nanoelectromechanical system (NEMS) switches is a promising approach for low-power, high-performance logic operation at temperatures higher than 300°C, beyond the capability of conventional silicon technology. These switches are capable of achieving virtually zero off-state current, microwave operating frequencies, radiation hardness, and nanoscale dimensions. Here, we report a microfabricated electromechanical inverter with SiC complementary NEMS switches capable of operating at 500°C with ultralow leakage current.

scholarly journals Energy Efficient Tri-State CNFET Ternary Logic Gates

2018 ◽  
Author(s):  
Sepher Tabrizchi ◽  
Fazel Sharifi ◽  
Abdel-Hameed A. Badawy
Keyword(s):  
Carbon Nanotube ◽  
Field Effect Transistors ◽  
Logic Gates ◽  
Logic Circuits ◽  
Ternary Logic ◽  
Large Area ◽  
Logic Function ◽  
Correct Operation ◽  
Power Efficient ◽  
Simulation Results

Traditional silicon binary circuits continue to face challenges such as high leakage power dissipation and large area of interconnections. Multiple-Valued Logic (MVL) and nano-devices are two feasible solutions to overcome these problems. In this paper, we present a novel method to design ternary logic circuits based on Carbon Nanotube Field Effect Transistors (CNFETs). The proposed designs use the unique properties of CNFETs, e.g., adjusting the Carbon Nanotube (CNT) diameters to have the desired threshold voltage and have the same mobility of P-FET and N-FET transistors. Each of our designed logic circuits implements a logic function and its complementary via a control signal. Also, these circuits have a high impedance state which saves power while the circuits are not in use. We show a more detailed application of our approach by designing a two-digit adder-subtractor circuit. We simulate the proposed ternary circuits using HSPICE via standard 32nm CNFET technology. The simulation results indicate the correct operation of the designs under different process, voltage and temperature (PVT) variations. Moreover, we designed a two-digit adder/subtractor and a power efficient ternary logic ALU based on the proposed gates. Simulation results show that the two-digit adder/subtractor using our proposed gates has 12X and 5X lower power consumption and PDP (power delay product) respectively, compared to previous designs.

scholarly journals Selective Remanent Ambipolar Charge Transport in Polymeric Field-Effect Transistors For High-Performance Logic Circuits Fabricated in Ambient

2014 ◽  
Vol 26 (44) ◽  
pp. 7438-7443 ◽  
Author(s):  
Simone Fabiano ◽  
Hakan Usta ◽  
Robert Forchheimer ◽  
Xavier Crispin ◽  
Antonio Facchetti ◽  
...  
Keyword(s):  
Charge Transport ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistors ◽  
Logic Circuits

scholarly journals Investigation of Multiple-valued Logic Technologies for Beyond-binary Era

2021 ◽  
Vol 54 (1) ◽  
pp. 1-30
Author(s):  
Zarin Tasnim Sandhie ◽  
Jill Arvindbhai Patel ◽  
Farid Uddin Ahmed ◽  
Masud H. Chowdhury
Keyword(s):  
Processing Speed ◽  
Number System ◽  
Ternary Logic ◽  
Binary Logic ◽  
Multiple Valued Logic ◽  
Real World Applications ◽  
Effective Synthesis ◽  
Processing And Storage ◽  
And Storage ◽  
Logic System

Computing technologies are currently based on the binary logic/number system, which is dependent on the simple on and off switching mechanism of the prevailing transistors. With the exponential increase of data processing and storage needs, there is a strong push to move to a higher radix logic/number system that can eradicate or lessen many limitations of the binary system. Anticipated saturation of Moore’s law and the necessity to increase information density and processing speed in the future micro and nanoelectronic circuits and systems provide a strong background and motivation for the beyond-binary logic system. In this review article, different technologies for Multiple-valued-Logic (MVL) devices and the associated prospects and constraints are discussed. The feasibility of the MVL system in real-world applications rests on resolving two major challenges: (i) development of an efficient mathematical approach to implement the MVL logic using available technologies, and (ii) availability of effective synthesis techniques. This review of different technologies for the MVL system is intended to perform a comprehensive investigation of various MVL technologies and a comparative analysis of the feasible approaches to implement MVL devices, especially ternary logic.

High-performance top-gated monolayer SnS2 field-effect transistors and their integrated logic circuits

Nanoscale ◽  
2013 ◽  
Vol 5 (20) ◽  
pp. 9666 ◽  
Author(s):  
H. S. Song ◽  
S. L. Li ◽  
L. Gao ◽  
Y. Xu ◽  
K. Ueno ◽  
...  
Keyword(s):  
Field Effect ◽  
High Performance ◽  
Field Effect Transistors ◽  
Logic Circuits ◽  
Integrated Logic

scholarly journals Performance Parameters of 3 Value 8t Cntfet Based Sram Cell Design using H-Spice

2019 ◽  
Vol 8 (2S5) ◽  
pp. 22-27
Keyword(s):  
Field Effect Transistors ◽  
Ballistic Transport ◽  
Memory Cell ◽  
Channel Length ◽  
Order Effects ◽  
Binary Number ◽  
Threshold Voltages ◽  
Sram Cell ◽  
Carbon Nano Tubes ◽  
Carbon Nano Tube

this paper presents a design of a 3ValueLogic 9T memory cell using carbon nano-tube field-effect transistors (CNTFETs). The carbon nano tubes with their superior transport properties, excellent current capabilities ballistic transport operation, 3-value logic have been proposed for 8T SRAM cell implementation in CNTFET technology. The CNTFET design to achieves the different threshold voltages. And it also avoids the usage of additional power supplies. The channel length used here is 18nm wide. The power consumption is reduced, as there is absence of stand-by power dissipation. Second order effects are removed by using CNTFET. In a 3 Value Logic, it only takes log3 (2n) bits to represent an n-bit binary number. In 3Value logic 9T memory cell based CNTFET have been developed and extensive HSPICE simulations have been performed in realistic environments. CNTFET 9T based SRAM cell proves which is Dynamic power better than CNTFET, based 3value logic 8T SRAM cell as well as CMOS SRAM cell.

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