scholarly journals Design of Area Efficient Beam Steering Control System for Phased Array Radar

Phased array radar architecture consists of the multiple antenna elements that are controlled by the active electronic circuits called T/R modules. Transmit/Receive modules (T/R modules) plays vital role in the modern phased array radar system for different radar applications. The problem asserted with electrically scanned phased array radar suffers from two main limitations. First one is the high hardware cost in terms of area and second one is the design complexity. To overcome the above issues, architecture has been developed by implementing single control unit, distributive memory elements and data control logic to design an area efficient control system. The entire system is implemented on Artix-7 FPGA.

Transmit/Receive (T/R) modules plays important role in advanced phased array radar system consists of array of antenna elements. In order to produce beam pattern for multiple radiating elements, the phase angle for each T/R module should be assigned with calculated value. When phase gradient is sent to T/R unit, phase values are calculated for array of elements associated with them. The paper presents a beam steering control system architecture consists of Graphical user interface, group controller with scalable T/R control unit (TRCU) having two hexa decagon T/R module controllers (HTRMCs) and control logic unit for parallel data flow. Calculation of 6 bit phase value from the phase gradient carried out using FPGA. Also, use of logic core and quantization of phase values are discussed. The paper also reports the area factor for the proposed architecture


Sensors ◽  
2021 ◽  
Vol 21 (21) ◽  
pp. 7382
Author(s):  
Yue-Ming Wu ◽  
Hao-Chung Chou ◽  
Cheng-Yung Ke ◽  
Chien-Cheng Wang ◽  
Chien-Te Li ◽  
...  

Phased array technology features rapid and directional scanning and has become a promising approach for remote sensing and wireless communication. In addition, element-level digitization has increased the feasibility of complicated signal processing and simultaneous multi-beamforming processes. However, the high cost and bulky characteristics of beam-steering systems have prevented their extensive application. In this paper, an X-band element-level digital phased array radar utilizing fully integrated complementary metal-oxide-semiconductor (CMOS) transceivers is proposed for achieving a low-cost and compact-size digital beamforming system. An 8–10 GHz transceiver system-on-chip (SoC) fabricated in 65 nm CMOS technology offers baseband filtering, frequency translation, and global clock synchronization through the proposed periodic pulse injection technique. A 16-element subarray module with an SoC integration, antenna-in-package, and tile array configuration achieves digital beamforming, back-end computing, and dc–dc conversion with a size of 317 ×149 × 74.6 mm3. A radar demonstrator with scalable subarray modules simultaneously realizes range sensing and azimuth recognition for pulsed radar configurations. Captured by the suggested software-defined pulsed radar, a complete range–azimuth figure with a 1 km maximum observation range can be displayed within 150 ms under the current implementation.


2011 ◽  
Vol 121-126 ◽  
pp. 4613-4618
Author(s):  
Zong Min Chen ◽  
San Nan Yuan

This paper presents a Field Programmable Gate Array based closed-loop motion control system for stepper motors. It consists of three components, including closed-loop control unit, driving unit and feedback unit. To overcome some of the drawbacks with an open-loop stepper motor motion control system or a conventional servo system, a self adaptive algorithm is proposed. By detecting the difference between the command and feedback signals, measures are taken prior to the occurrence of loss synchronization. All of the control logic is implemented in one FPGA chip. Simulation and testing results are presented at the end of this paper.


2006 ◽  
Vol 52 (6) ◽  
pp. 417-424 ◽  
Author(s):  
A R Ganesan ◽  
P Arulmozhivarman ◽  
D Mohan ◽  
A K Gupta

Author(s):  
Katsuyuki Takahashi ◽  
Tomoshige Yasuda ◽  
Makoto Endoh ◽  
Masahiro Kurosaki

This paper presents extensive use of dynamic simulation of Compressed Air Energy Storage Gas Turbine (CAES G/T) for control system design, control logic development and software validation which significantly reduced development time and cost of the control system and contributed to successful demonstration of a 2,000 kW pilot plant with technical risk mitigation. The CAES G/T is one of the electrical load leveling power plants. High-pressure air compressed by motor-driven compressors in nighttime and stored in underground reservoir is provided to the CAES G/T for power generation in day time. Based on extensive simulation, we finalized control system configuration and control component specification. Developed control logic was tested by comprehensive simulation tests covering almost all expected operations such as start, acceleration, load application and rejection, recuperator active/non-active mode transfer etc. Finally, we conducted hardware in the loop simulation test to assure Electronic Control Unit (ECU) function and performance. An actual ECU and a real time simulator with the CAES G/T model, sensor models and actuator models were used in this test. Tests at a 2,000 kW pilot plant started in January 2001. The full load rejection test showed 9.9% overspeed of the rotor, which is 1% less than the simulation predicted value and within the regulation limit. Only minor control parameter and logic adjustments were required during the tests. Regular operation of the plant started in June 2001.


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