scholarly journals Minimize of Harmonic Distortion and Power Quality Analisis using a New Discontinuous Svpwm of Multilevel Inverer for Indestrial Deives

2019 ◽  
Vol 8 (4) ◽  
pp. 8525-8529

The paper proposed space vector pulse width modulation is comparing the author Ramakrishna maheswari and Joan Nicolas reference in the paper. In speed control strategies for the recruitment engine has driven their use in nearly every single electrical drive. For better execution the high control acceptance machines are planned at medium voltage (mv) rating. In the event that single power semiconductor switch is legitimately associated with medium voltage, it might harm. Too, customary inverters produce high recurrence normal mode voltage. Staggered inverter is an elective answer for high control and medium voltage A.C. drive. It begins from three levels. The staggered inverter topology blends a sinusoidal voltage from a few degrees of voltages got from capacitor voltage sources. In this paper, a way to deal with diminish total harmonic distortion utilizing four level diode clamped staggered inverter (DCMLI) for three stage enlistment engine drive is proposed.

2021 ◽  
Vol 2062 (1) ◽  
pp. 012032
Author(s):  
Nishant Matale ◽  
Mohan Thakre ◽  
Rakesh Shriwastava

Abstract A highly popular alternative in medium voltage and high-power applications is multilevel converters because of their superior performance over conventional two-level converters. The most commonly used control methods in the case of multilevel inverters are sine pulse width modulation (SPWM) and space vector pulse width modulation (SVPWM) methods. Among these two control strategies, SVPWM has superior performance over SPWM in terms of DC bus voltage utilization along with a reduction in total harmonic distortion (THD) of line voltages. The classical SVPWM method has various drawbacks such as computational complexity for identifying the location of reference voltage vector, sector identification, region identification, memory requirement to store lookup tables for switching vectors. The novel simplified SVPWM technique is presented for cascaded H-Bridge multilevel inverter (CHBMLI) in this paper. This simplified SVPWM method has overcome the drawbacks of the classical SVPWM method. This new technique has been implemented into a five-level CHBMLI to evaluate performance and also to compare with the SPWM method. The simulation has been performed in MATLAB software.


The medium voltage & high power converters are used in electrical railway system because of its high efficiency. Due to the use of heavy load in the railway system, conventional inverters causes power quality issues such as harmonic distortion, low power factor, etc. In this paper, new cascaded multilevel inverter (MLI) using cascaded H-bridge is introduced. The advantage of the proposed method is to mitigate power semiconductor switches in number which reduces the cost of the circuit as well as the complexity. The analysis and evaluation of various Sinusoidal Pulse Width Modulation (SPWM) Methods with different levels of an inverter has been modeled and simulated by using MATLAB/Simulink.


Circuit World ◽  
2020 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Anbarasan P. ◽  
Krishnakumar V. ◽  
Ramkumar S. ◽  
Venkatesan S.

Purpose This paper aims to propose a new MLI topology with reduced number of switches for photovoltaic applications. Multilevel inverters (MLIs) have been found to be prospective for renewable energy applications like photovoltaic cell, as they produce output voltage from numerous separate DC sources or capacitor banks with reduced total harmonic distortion (THD) because of a staircase like waveform. However, they endure from serious setbacks including larger number of capacitors, isolated DC sources, associated gate drivers and increased control difficulty for higher number of voltage levels. Design/methodology/approach This paper proposes a new three-phase multilevel DC-link inverter topology overpowering the previously mentioned problems. The proposed topology is designed for five and seven levels in Matlab/Simulink with gating pulse using multicarrier pulse width modulation. The hardware results are shown for a five-level MLI to witness the viability of the proposed MLI for medium voltage applications. Findings The comparison of the proposed topology with other conventional and other topologies in terms of switch count, DC sources and power loss has been made in this paper. The reduction of switches in proposed topology results in reduced power loss. The simulation and hardware show that the output voltage yields a very close sinusoidal voltage and lesser THD. Originality/value The proposed topology can be extended for any level of output voltage which is helpful for sustainable source application.


Author(s):  
Adireddy Ramesh, ◽  
O. Chandra Sekhar ◽  
M. Siva Kumar

<p>Penetration of multilevel inverters (MLI) in to high power and medium voltage application has been increasing because of its advantages. The conventional two levels inverter has high harmonic distortion which gives poor power quality. Lot of topologies has been developed to overcome the drawbacks of a two level inverter. These topologies include more number of switching devices which increases the design complexity and cost. The optimum design of inverter requires less number of switches with better quality in waveform. In this paper, a symmetrical five level and seven levels inverter configuration with simplified pulse width modulation technique is proposed. This proposed inverter requires less switches, less protection circuits along with low cost and size. The analysis of the inverter circuits is done by using Matlab/Simulink software. The synthesized staircase wave form is shown and total harmonic distortion (THD) is also measured.</p>


Author(s):  
Nikhil Agrawal

Multilevel inverter is a modified version of inverter. Multilevel inverter recently emerged in the area of high power and medium voltage application. In the last few decades, the great innovation has been done to improve the inverter performance, and it is challenging even today. The multilevel inverter performance is examined by total harmonic distortion and component required. In multilevel, as level increases, the total harmonic distortion value decreases, but the number of components required and driver circuit increases that make the circuit more complex and also the effect on cost. So, the challenge is to balance the bridge between cost and total harmonic distortion. This chapter simulates the various levels of conventional cascade H-bridge inverter and new proposed topology of multilevel inverter with using different modulation techniques and with using filter circuit and without filter circuit.


2021 ◽  
Vol 9 (04) ◽  
pp. 34-43
Author(s):  
K. Fernand Koffi ◽  
◽  
Agoua Raoule ◽  
Diety Landry ◽  
Georges Loum ◽  
...  

The need to use SPWM controlled voltage inverters in MV, led us to examine how to filter alternative signals with filters (L-C) and (RL-C). This allowed us to decide on the use of certain formulas for calculating the elements of these filters. Likewise, we have proposed a method of calculating the resistance R by mathematical iterations without using the quality factor Q, in order to obtain a low error rate between the RMS values and the fundamental effective values and THDs respecting the standard 519 IEEE - 2014. The results of these studies obtained using the MATLAB-SIMULINK software are presented in the penultimate session of this article. Nomenclature SPWM Sinusoidal Pulse-Width-Modulation THD Total Harmonic distortion SN Apparent power of the alternating load MV Medium voltage alternating voltage (1 kV --- 50 kV) Uph phase-to-phase voltage at the ac load RMS Root Mean Squared R L C Resistance Inductance Capacitor MVDC Medium voltage direct current VSI Voltage Source Inverter


2018 ◽  
Vol 7 (03) ◽  
pp. 23727-23736
Author(s):  
M. Devika ◽  
M. Sundaraperumal ◽  
M.Valan Rajkumar

Multilevel inverters have become more attractive for researchers due to low total harmonic distortion in the output voltage and low electromagnetic interference. This paper proposes a novel single-stage quasi-cascaded H-bridge five-level boost inverter. The proposed quasi cascaded h-bridge five-level boost inverter has the advantages over the cascaded H-bridge quasi-Z-source inverter in cutting down passive components. Consequently, size, cost, and weight of the proposed inverter are reduced. A capacitor with low voltage rating is added to the proposed topology to remove an offset voltage of the output AC voltage when the input voltages of two modules are unbalanced. Besides, sinusoidal pulse width modulation techniques used here. PID controller is used to control the capacitor voltage of each module. This paper presents circuit analysis, the operating principles, and simulation results of the proposed system


Author(s):  
R. Palanisamy ◽  
V. Sinmayee ◽  
K. Selvakumar ◽  
K. Vijayakumar

<p>In this paper a novel 5 switch seven level DC-AC inverter is being proposed. The proposed multilevel inverter uses reduced number of switches as compared to the switches used in the conventional multilevel inverter. The inverter has been designed to generate a 7 level AC output using 5 switches. The voltage stress on each of the switches as well as the switching losses is found to be less, minimized common mode voltage (CMV) level and reduced total harmonic distortion. The proposed 7-level inverter topology has four dc sources, which is energized through the PV system. Proposed inverter is controlled with help of multicarrier sinusoidal pulse width modulation (MCSPWM).The simulation and hardware results were verified using matlab simulink and dspic microcontroller respectively.</p>


Author(s):  
Leonardus Heru Pratomo ◽  
F. Danang Wijaya ◽  
Eka Firmansyah

The five-level inverter has been used for many applications in renewable energy systems. Even though its harmonic distortion was lower than the conventional two-level inverter. The five-level converter has some disadvantages such as increasing power semiconductor, complex pulse width modulation control methods, and problem with the voltage balancing of the capacitor. This paper aims to propose a modified five-level inverter based on sinusoidal pulse width modulation using phase shifted carrier to enhancing the capacitor voltage balancing. This modified five-level inverter reduces the overall cost and the complexity of the pulse width modulator. Thus making the proposed control system highly simple. The performance and its controller were validated by means of standard laboratory equipments. The analysis, simulation and implementation result showed better performance of five-level inverter.


Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 331
Author(s):  
Safa Haq ◽  
Shuvra Prokash Biswas ◽  
Md. Kamal Hosain ◽  
Md. Ashib Rahman ◽  
Md. Rabiul Islam ◽  
...  

Due to global warming and shortage of fossil fuels, the grid-connected solar photovoltaic (PV) system has gained significant popularity all over the world. The modular multilevel cascaded (MMC) inverter is the natural choice for step-up transformer and line filter less direct medium voltage grid integration of solar PV systems. However, power quality and loss are the important issues while connecting the PV system to the medium voltage grid through MMC inverter. Modulation technique is the key to maintain output power quality, e.g., total harmonic distortion (THD) and to ensure low switching and conduction losses. In this paper, an advanced modulation technique named “triangle saturated common mode pulse width modulation (TSCMPWM)” control is proposed for a 3-phase 5-level MMC inverter-based grid-tied PV system. Compared to traditional modulation techniques, the proposed TSCMPWM control offers the lowest voltage THD as well as lower inverter power losses. Performance of the proposed modulation technique is evaluated in MATLAB/Simulink environment and tested with a reduced scale prototype test platform. Both simulation and experimental results show the effectiveness of the proposed modulation technique.


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