scholarly journals FOUR SWITCH THREE PHASE SEPIC INVERTER WITH FRONT END BOOST CONVERTER

Author(s):  
Raheema V ◽  
Fasil T. Mohammed

In this paper, four switch sepic inverter with front end boost converter capable of producing quality three phase ac output is explained. Proposed topology is an advanced one when comparing with conventional topologies .Converter offer a design for the inverter with the combination of single-ended primary-inductance , which can obtain higher phase voltages compared to conventional four switch and six switch three phase inverters. A differential arrangement of SEPIC enables to obtained three phase balanced output voltage with only four switches. The output voltage is pure sinusoidal without the help of external filter. This proposed inverter is designed to reduce the cost, complexity and switching losses .It also improves the efficiency and reduces the harmonic distortion. Here the output of the inverters are connected deferentially across the load. The line voltage can not exceed the full value of the input dc voltage, for avoiding this a dc - dc boost converter is placed in the front end of the four switch sepic inverter, thus producing the required output voltage along with the sinusoidal nature. Due to this features, the inverter can be used for the grid integration and pv based power extraction. Proposed topology is operated in both current control algorithm and a modified sine pwm control technique. In this paper it is based on the novel sine pwm control technique. The topology is analysed, simulated using MATLAB/SIMULINK and also a prototype is accomplished to verify the feasibility of the proposed topology. Index Terms—Three-phase inverter, Bi directionl sinlge ended primary inductance converter, Novel sin pwm control, DC-DC boost converter,

Author(s):  
Chinnapettai Ramalingam Balamurugan ◽  
S.P. Natarajan ◽  
T.S. Anandhi ◽  
B. Shanthi

<p>Depending on the number of levels in output voltage, inverters can be divided into two categories: two level inverter and Multi Level Inverters (MLIs). An inverter topology for high voltage and high power applications that seems to be gaining interest is the MLI. In high power and high voltage applications, the two level inverters have some limitations in operating at high frequency mainly due to switching losses and constraints of device rating.In this paper, a three phase H + type FCMLI (Flying Capacitor MLI) using sinusoidal reference, third harmonic injection reference, 60 degree reference and stepped wave reference are initially developed using SIMULINK and then implemented in real time environment using dSPACE. In H-type FCMLI with R-load it is inferred that bipolar COPWM-C provides output with relatively low distortion for 60 degree reference and bipolar COPWM-C strategy is found to perform better since it provides relatively higher fundamental RMS output voltage for THI reference. The five level output voltages of the chosen MLIs obtained using the MATLAB and dSPACE based PWM (Pulse Width Modulation) strategies and the corresponding %THD (Total Harmonic Distortion), V<sub>RMS</sub> (fundamental), CF (Crest Factor) and FF (Form Factor) are presented and analyzed.</p>


Electronics ◽  
2019 ◽  
Vol 8 (6) ◽  
pp. 625 ◽  
Author(s):  
Eun-Su Jun ◽  
So-young Park ◽  
Sangshin Kwak

In this paper, the model predictive current control (MPCC) method using two vectors has been proposed to control output currents of three-phase voltage source inverters (VSIs) with small current errors and current ripples. Also, the proposed method can reduce switching losses by applying the vector pre-selection technique to the MPCC for the VSI. The VSI generates seven voltage vectors to control the output currents, but the proposed method uses four available voltage vectors with one switch, which are classified by the vector pre-selection method clamping one leg and conducting the largest output current among the three legs to reduce the switching losses. In the proposed method, selecting two future voltage vectors among the four voltage vectors and dividing them in a future sampling period are determined by an optimization process. The proposed method results in the lower total loss, better total harmonic distortion (THD), and smaller current errors than the conventional method with half the sampling period of the proposed method due to the optimal process. Simulation and experimental results of the three-phase VSIs are presented in order to verify the effectiveness of the proposed method.


Author(s):  
Fouad Farah ◽  
Mustapha El Alaoui ◽  
Abdelali El Boutahiri ◽  
Mounir Ouremchi ◽  
Karim El Khadiri ◽  
...  

In this paper, we aim to make a detailed study on the evaluation and the characteristics of the non-inverting buck–boost converter. In order to improve the behaviour of the buck-boost converter for the three operating modes, we propose an architecture based on peak current-control. Using a three modes selection circuit and a soft start circuit, this converter is able to expand the power conversion efficiency and reduce inrush current at the feedback loop. The proposed converter is designed to operate with a variable output voltage. In addition, we use LDMOS transistors with low on-resistance, which are adequate for HV applications. The obtained results show that the proposed buck-boost converter perform perfectly compared to others architecture and it is successfully implemented using 0.18 μm CMOS TSMC technology, with an output voltage regulated to 12V and input voltage range of 4-20 V. The power conversion efficiency for the three operating modes buck, boost and buck-boost are 97.6%, 96.3% and 95.5% respectively at load current of 4A.


Author(s):  
Peethala Rajiv Roy ◽  
P. Parthiban ◽  
B. Chitti Babu

Abstract This paper deals with implementation of a single-phase three level converter system under low voltage condition. The frequency of the switches is made constant and involves change in ${t_{on}}$ and ${t_{off}}$ duration. For this condition the pulse width modulation control scheme for a single phase three level rectifier is developed to improve the power quality. The hysteresis current control technique is adopted to bring forth three-level PWM on the dc side of the bridge rectifier and to achieve high power factor and low harmonic distortion. Based on the proposed control scheme, the line current is driven to follow the sinusoidal current command which is in phase with the supply voltage. By using three-level voltage pattern the blocking voltage of each power device is clamped to half of the dc link voltage. The simulation and experimental results of 20W converter under low input voltage condition are shown to verify the circuit performance. Open loop simulation and hardware tests are implemented by applying a low voltage of 15 V(rms) on the input side.


Energies ◽  
2018 ◽  
Vol 11 (12) ◽  
pp. 3389 ◽  
Author(s):  
Chivon Choeung ◽  
Meng Leang Kry ◽  
Young Il Lee

This paper presents a robust control technique for three-phase chargers under unbalanced grid conditions. The control method consists of inner-loop robust grid-current control and outer-loop proportional integral control for constant current (CC) and constant voltage (CV) control. A dual-current control for the inner-loop positive and negative sequence is employed to eliminate the unbalanced current caused by the grid so that a constant current and voltage can be provided to the batteries. The inner-loop robust controllers utilize state feedback with integral action in the dq-synchronous frame. A linear matrix inequality-based optimization scheme is used to determine stabilizing gains of the controllers to maximize the convergence rate to steady state in the presence of uncertainties. The uncertainties of the system are described as the potential variation range of the inductance and resistance in the L-filter.


Author(s):  
G. Vijaykrishna ◽  
Y. Kusumalatha

This paper examines how a Reversing voltage multilevel inverter (RVMLI) strategy is enforced to develop multilevel inverter fulfilment. This approach has been used SPWM-PD technique to regulate the electrical inverter. It desires numerous less range of carrier signals to deliver gate pulses of switches. Increasing within the levels during this strategy aid in reduction of output voltage harmonics expeditiously and improves power quality at output of the electrical inverter. It wants a lowered quantity of total switches, which is in a position to decreases of switching losses in this process. The Three-phase reversing voltage multilevel inverter of 7- level and 9- level is accomplished for R-load and R-L load and Three Phase Induction Motor. A reversing voltage multilevel inverter of 7- level and 9- level simulation is intended and developed. Mat lab/Simulink outcome is awarded to validate the proposed scheme.


Author(s):  
R. Palanisamy ◽  
K. Vijayakumar ◽  
Aishwarya Bagchi ◽  
Vachika Gupta ◽  
Swapnil Sinha

<p>This paper proposes implementation of coupled inductor based 7 level inverter with reduced number switches. The inverter which generates the sinusoidal output voltage by the use of coupled inductor with reduced total harmonic distortion. The voltage stress on each switching devices, capacitor balancing and common mode voltage can be minimized. The proposed system which gives better controlled output current and improved output voltage with diminished THD value. The switching devices of the system are controlled by using hysteresis current control algorithm by comparing the carrier signals with constant pulses with enclosed hysteresis band value. The simulation and experimental results of the proposed system outputs are verified using matlab/Simulink and TMS320F3825 dsp controller respectively.</p>


Circuit World ◽  
2020 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Anbarasan P. ◽  
Krishnakumar V. ◽  
Ramkumar S. ◽  
Venkatesan S.

Purpose This paper aims to propose a new MLI topology with reduced number of switches for photovoltaic applications. Multilevel inverters (MLIs) have been found to be prospective for renewable energy applications like photovoltaic cell, as they produce output voltage from numerous separate DC sources or capacitor banks with reduced total harmonic distortion (THD) because of a staircase like waveform. However, they endure from serious setbacks including larger number of capacitors, isolated DC sources, associated gate drivers and increased control difficulty for higher number of voltage levels. Design/methodology/approach This paper proposes a new three-phase multilevel DC-link inverter topology overpowering the previously mentioned problems. The proposed topology is designed for five and seven levels in Matlab/Simulink with gating pulse using multicarrier pulse width modulation. The hardware results are shown for a five-level MLI to witness the viability of the proposed MLI for medium voltage applications. Findings The comparison of the proposed topology with other conventional and other topologies in terms of switch count, DC sources and power loss has been made in this paper. The reduction of switches in proposed topology results in reduced power loss. The simulation and hardware show that the output voltage yields a very close sinusoidal voltage and lesser THD. Originality/value The proposed topology can be extended for any level of output voltage which is helpful for sustainable source application.


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