Simulation and dSPACE Based Implementation of Various PWM Strategies for A New H-Type FCMLI Topology

2015 ◽  
Vol 6 (3) ◽  
pp. 615
Author(s):  
Chinnapettai Ramalingam Balamurugan ◽  
S.P. Natarajan ◽  
T.S. Anandhi ◽  
B. Shanthi
Keyword(s):  
High Voltage ◽  
High Power ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Crest Factor ◽  
Third Harmonic ◽  
Switching Losses ◽  
Three Phase ◽  
Inverter Topology

<p>Depending on the number of levels in output voltage, inverters can be divided into two categories: two level inverter and Multi Level Inverters (MLIs). An inverter topology for high voltage and high power applications that seems to be gaining interest is the MLI. In high power and high voltage applications, the two level inverters have some limitations in operating at high frequency mainly due to switching losses and constraints of device rating.In this paper, a three phase H + type FCMLI (Flying Capacitor MLI) using sinusoidal reference, third harmonic injection reference, 60 degree reference and stepped wave reference are initially developed using SIMULINK and then implemented in real time environment using dSPACE. In H-type FCMLI with R-load it is inferred that bipolar COPWM-C provides output with relatively low distortion for 60 degree reference and bipolar COPWM-C strategy is found to perform better since it provides relatively higher fundamental RMS output voltage for THI reference. The five level output voltages of the chosen MLIs obtained using the MATLAB and dSPACE based PWM (Pulse Width Modulation) strategies and the corresponding %THD (Total Harmonic Distortion), V<sub>RMS</sub> (fundamental), CF (Crest Factor) and FF (Form Factor) are presented and analyzed.</p>

A new three-phase multilevel DC-link inverter topology with reduced switch count for photovoltaic applications

Circuit World ◽  
2020 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Anbarasan P. ◽  
Krishnakumar V. ◽  
Ramkumar S. ◽  
Venkatesan S.
Keyword(s):  
Power Loss ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Photovoltaic Cell ◽  
Content Type ◽  
Energy Applications ◽  
Three Phase ◽  
Photovoltaic Applications ◽  
Inverter Topology

Purpose This paper aims to propose a new MLI topology with reduced number of switches for photovoltaic applications. Multilevel inverters (MLIs) have been found to be prospective for renewable energy applications like photovoltaic cell, as they produce output voltage from numerous separate DC sources or capacitor banks with reduced total harmonic distortion (THD) because of a staircase like waveform. However, they endure from serious setbacks including larger number of capacitors, isolated DC sources, associated gate drivers and increased control difficulty for higher number of voltage levels. Design/methodology/approach This paper proposes a new three-phase multilevel DC-link inverter topology overpowering the previously mentioned problems. The proposed topology is designed for five and seven levels in Matlab/Simulink with gating pulse using multicarrier pulse width modulation. The hardware results are shown for a five-level MLI to witness the viability of the proposed MLI for medium voltage applications. Findings The comparison of the proposed topology with other conventional and other topologies in terms of switch count, DC sources and power loss has been made in this paper. The reduction of switches in proposed topology results in reduced power loss. The simulation and hardware show that the output voltage yields a very close sinusoidal voltage and lesser THD. Originality/value The proposed topology can be extended for any level of output voltage which is helpful for sustainable source application.

scholarly journals Design and Analyses of Multi-Carrier Pulse Width Modulation Techniques for Double Level Circuit Based Cascaded H-Bridge Multilevel Inverter

2021 ◽  
Vol 23 (2) ◽  
pp. 131-136
Author(s):  
Aneel Kumar Maheshwari ◽  
Mukhtiar Ahmed Mahar ◽  
Abdul Sattar Larik ◽  
Abdul Hameed Soomro
Keyword(s):  
Power Quality ◽  
High Power ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Voltage Waveform ◽  
Switching Losses ◽  
Symmetrical Model ◽  
Multi Level ◽  
Phase Arrangement

The paper introduces the cascaded H-Bridge multi-level inverter with single-phase arrangement connected series with full-bridge inverter and CHBMLI configuration integrated with Double level circuit is proposed to reduce the harmonic distortion to get high power quality. In the proposed configuration, a half-bridge inverter has been implemented to increase the output voltage waveform nearly twice as compared with the conventional Cascaded H-Bridge MLI. For high Power quality, the output voltage waveform with the reference of sinusoidal, the phase opposition disposition carrier arrangement has been utilized in PWM for producing gate pulse of switches. The high waveform of output voltage achieved with the less no of switches, less % THD distortion, less conduction and switching losses. The purposed symmetrical model of CHBMLI is successfully verified using MATLAB based on simulation with DLC configuration.

scholarly journals Simulation and Real Time Implementation of Various PWM Strategies for 3 Φ Multilevel Inverter Using FPGA

2018 ◽  
Vol 6 (1) ◽  
pp. 1
Author(s):  
C. R. Balamurugan ◽  
S. P. Natarajan ◽  
T. S. Anandhi ◽  
B. Shanthi
Keyword(s):  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Experimental Result ◽  
Crest Factor ◽  
Hybrid Strategy ◽  
Switching Losses ◽  
Three Phase ◽  
Multi Level ◽  
Low Distortion

For high power applications Multilevel Inverter (MLI) is extensively used. The major advantages of MLI are good power quality, low switching losses and maintenance of the desired voltage. In this work, the three phase cascaded multi level inverter is analyzed under various modulation techniques that include Sub-Harmonic Pulse Width Modulation (SHPWM) i.e. Phase Disposition (PD) strategy, Phase Opposition Disposition (POD) strategy, Alternate Phase Opposition Disposition (APOD) strategy, hybrid strategy (PD and PS) and Phase Shift (PS) strategy. The study will help to choose those techniques with reduced harmonics for the chosen three phase cascaded MLI with R-L load. The Total Harmonic Distortion (THD), VRMS (fundamental), crest factor and form factor are evaluated for various modulation indices at two different switching frequencies (3.15KHz and 6 KHz). Simulation is performed using MATLAB-SIMULINK. It is observed that HYBRID PWM and PSPWM methods provide output with relatively low distortion for low and high switching frequencies. PODPWM and PSPWM are found to perform better since they provide relatively higher fundamental RMS output voltage for 6 KHz and 3.15 KHz switching frequencies. The experimental result shows PSPWM provide output with low distortion and HYBRID PWM provide output with higher fundamental RMS voltage for fc=3.15KHz. The experimental results were obtained only for fc=3.15KHz.

scholarly journals Non-conventional Cascade Multilevel Inverter with Lower Number of Switches by Using Multilevel PWM

2021 ◽  
Vol 17 (1) ◽  
pp. 1-13
Author(s):  
Adala Abdali ◽  
Ali Abdulabbas ◽  
Habeeb Nekad
Keyword(s):  
High Voltage ◽  
High Power ◽  
Power Loss ◽  
Output Voltage ◽  
Lower Number ◽  
Multilevel Inverter ◽  
Three Phase ◽  
Multi Level ◽  
Simulation Results ◽  
Circuit Configuration

The multilevel inverter is attracting the specialist in medium and high voltage applications, among its types, the cascade H bridge Multi-Level Inverter (MLI), commonly used for high power and high voltage applications. The main advantage of the conventional cascade (MLI) is generated a large number of output voltage levels but it demands a large number of components that produce complexity in the control circuit, and high cost. Along these lines, this paper presents a brief about the non-conventional cascade multilevel topologies that can produce a high number of output voltage levels with the least components. The non-conventional cascade (MLI) in this paper was built to reduce the number of switches, simplify the circuit configuration, uncomplicated control, and minimize the system cost. Besides, it reduces THD and increases efficiency. Two topologies of non-conventional cascade MLI three phase, the Nine level and Seventeen level are presented. The PWM technique is used to control the switches. The simulation results show a better performance for both topologies. THD, the power loss and the efficiency of the two topologies are calculated and drawn to the different values of the Modulation index (ma).

Research on the High Frequency Realization of High-Power Inverter

2011 ◽  
Vol 383-390 ◽  
pp. 1077-1083
Author(s):  
Run Hua Liu ◽  
Gang Wang
Keyword(s):  
High Power ◽  
High Frequency ◽  
Output Voltage ◽  
Harmonic Distortion ◽  
Soft Switching ◽  
Multilevel Inverter ◽  
Switching Frequency ◽  
Switching Losses ◽  
Simulation And Experiment

The paper presents the inverter method which based on cascade multilevel inverter and MOSFET-assisted soft-switching of IGBT and modulation strategy against the double requirement of high-power inverter and high frequency. The method can effectively improve the output voltage, reduce harmonic distortion and switching losses, improve the switching frequency and meet the double requirement of the high-power inverter and high frequency. The method proved to be feasible by simulation and experiment.

scholarly journals Solar Photovoltaic System-Based Reduced Switch Multilevel Inverter for Improved Power Quality

2022 ◽  
Vol 4 (1) ◽  
pp. 1-13
Author(s):  
Madhu Andela ◽  
Ahmmadhussain Shaik ◽  
Saicharan Beemagoni ◽  
Vishal Kurimilla ◽  
Rajagopal Veramalla ◽  
...  
Keyword(s):  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Photovoltaic System ◽  
Solar Photovoltaic ◽  
Switching Losses ◽  
Minimum Number ◽  
Multi Level ◽  
Solar Photovoltaic System

This paper deals with a reduced switch multi-level inverter for the solar photovoltaic system-based 127-level multi-level inverter. The proposed technique uses the minimum number of switches to achieve the maximum steps in staircase AC output voltage when compared to the flying capacitor multi-level inverter, cascaded type multilevel inverter and diode clamped multi-level inverter. The use of a minimum number of switches decreases the cost of the system. To eliminate the switching losses, in this topology a square wave switch is used instead of pulse width modulation. Thereby the total harmonic distortion (THD) and harmonics have been reduced in the pulsating AC output voltage waveform. The performance of 127-level MLI is compared with 15 level, 31-level and 63-level multilevel inverters. The outcomes of the solar photovoltaic system-based 127-level multi-level inverter have been simulated in a MATLAB R2009b environment.

scholarly journals Multicarrier PWM Strategies for Hybrid Symmetrical Multilevel Inverter with Reduced Switch Count

2020 ◽  
Vol 9 (5) ◽  
pp. 860-866
Keyword(s):  
Electromagnetic Interference ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Switching Frequency ◽  
Third Harmonic ◽  
Multilevel Inverters ◽  
High Switching Frequency

Multilevel inverters are widely used for high power and high voltage applications. The performance of multilevel inverters are superior to conventional two level inverters in terms of reduced total harmonic distortion, higher dc link voltages, lower electromagnetic interference and increased quality in the output voltage waveform. This paper presents a single phase hybrid eleven level multilevel inverter topology with reduced switch count to compensate the above mentioned disadvantages. This paper also presents various high switching frequency based multi carrier pulse width modulation strategies such as Phase Disposition PWM Strategy (PDPWM), Phase Opposition and Disposition PWM Strategy (PODPWM), Alternate Phase opposition Disposition PWM (APODPWM), Carrier Overlapping PWM (COPWM), Variable frequency carrier PWM (VFPWM), Third Harmonic Injection PWM (TFIPWM) applied to the proposed eleven level multilevel inverter and is analyzed for RL load. FFT analysis is carried out and total harmonic distortion, fundamental output voltage are calculated. Simulation is carried out in MATLAB/SMULINK.

A new tapped sources stack succored modified HX bridge MLI

Circuit World ◽  
2020 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Kannan Chandrasekaran ◽  
Nalin Kant Mohanty ◽  
Selvarasu Ranganathan
Keyword(s):  
High Power ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Renewable Energy Sources ◽  
Harmonic Distortion ◽  
Content Type ◽  
Multiple Input ◽  
Field Programmable ◽  
Simulation And Experiment ◽  
Practical Implications

Purpose Multilevel inverter (MLI) is a prevailing sensible alternative to two-level inverters that offer a high-quality output voltage waveform, wherein the multiple input direct current (DC) levels are established by using isolated DC sources, batteries and renewable energy sources. The purpose of this paper is to develop MLI to offer lower total harmonic distortion (THD), higher output voltage levels and reduced switching components for high power applications. Design/methodology/approach In this paper, a new tapped sources stack succored modified HX bridge MLI (TSSSMHXBMLI) topology is proposed which includes two modules, such as tapped sources stack (TSS) and modified HX bridge inverter, which perform their function in a single stage. Also, this paper outlines the formulaic implementation of the multicarrier/sub-harmonic pulse width modulation (MCPWM/SHPWM) in a Xilinx Spartan3E-500 field programmable gate array (FPGA) is suitable for the developed MLI. Findings The feasibility of the suggested topology is well proved by both simulation and experiment results. Practical implications This paper examines a new topology of TSSSMHXBMLI with a view to minimize total count of switching components against basic MLI topologies. The operating sequence of the suggested TSSSMHXBMLI topology is verified with the simulation study followed by an experimental investigation. Originality/value The simulation and experimental results of suggested MLI topology reveals to obtain lower THD, higher output voltage levels and reduced switching components for high power applications.

New series parallel switched multilevel inverter for a three phase induction motor

2016 ◽  
Vol 24 (8) ◽  
pp. 1440-1454 ◽  
Author(s):  
R Geetha ◽  
M Ramaswamy
Keyword(s):  
Induction Motor ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Multilevel Inverter ◽  
Sinusoidal Voltage ◽  
Three Phase ◽  
Frequency Components ◽  
Simulation Results ◽  
Improved Performance ◽  
Inverter Topology

The paper develops a new topology for a three phase multilevel inverter with a view to reduce the number of switches in the path of the current. It encompasses a mechanism to reach the desired target voltage and in turn enable the three phase induction motor to operate at the specified speed. The formulation incorporates the theory of an appropriate pulse width modulation strategy to ensure the elimination of higher frequency components of the output voltage. The use of relatively smaller number of carriers in the process of generating the switching pulses serves to enhance the output voltage spectrum. The intriguing merits of the phase disposition over the other modulation schemes enable to arrive at a nearly sinusoidal voltage. The performance obtained from the prototype substantiate the MATLAB based simulation results and establish the ability of the series parallel switched multilevel inverter topology to offer an improved performance for the induction motor.

scholarly journals A Survey: Space Vector PWM (SVPWM) in 3φ Voltage Source Inverter (VSI)

2018 ◽  
Vol 8 (1) ◽  
pp. 11 ◽  
Author(s):  
Shalini Vashishtha ◽  
K.R. Rekha
Keyword(s):  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Voltage Source ◽  
Maximum Output ◽  
Control Mechanisms ◽  
Voltage Source Inverter ◽  
Space Vector Pwm ◽  
Space Vector ◽  
Switching Losses

Since last decades, the pulse width modulation (PWM) techniques have been an intensive research subject. Also, different kinds of methodologies have been presented on inverter switching losses, inverter output current/ voltage total harmonic distortion (THD), inverter maximum output of DC bus voltage. The Sinusoidal PWM is generally used to control the inverter output voltage and it helps to maintains drive performance. The recent years have seen digital modulation mechanisms based on theory of space vector i.e. Space vector PWM (SVPWM). The SVPWM mechanism offers the enhanced amplitude modulation indexes (MI) than sinusoidal PWM along with the reduction in the harmonics of inverter output voltage and reduced communication losses. Currently, the digital control mechanisms have got more attention than the analog counterparts, as the performance and reliability of microprocessors has increased. Most of the SVPWM mechanisms are performed by using the analog or digital circuits like microcontrollers and DSPs. From the recent study, analysis gives that use of Field Programmable Gate Arrays (FPGA) can offer more efficient and faster solutions. This paper discusses the numerous existing research aspects of FPGA realization for voltage source inverter (VSI) along with the future line of research.

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