SVPWM Control of Cascaded H-Bridge Multilevel Inverters

2012 ◽  
Vol 246-247 ◽  
pp. 797-800
Author(s):  
Zheng Lu ◽  
Ju Xian Chen
Keyword(s):  
Output Voltage ◽  
Control Algorithm ◽  
Pulse Width Modulation ◽  
Voltage Level ◽  
Multilevel Inverters ◽  
The Difference ◽  
Modulation Control ◽  
Drive Systems ◽  
Algorithm Base ◽  
Cascaded Multilevel Inverter

To solve the problem of computational complexity in H bridge cascaded multilevel inverter (HBCMI) control, this paper proposes a simple space vector pulse width modulation control algorithm. Base on the topology configuration of HBCMI, the output voltage is deduced, which is the difference value between two-level inverter group output voltage formed by left bridge arms and by right bridge arms. The control complexity is independent of inverter voltage level and it is suitable to every voltage level. To verify the algorithms, different level cascaded H-bridge inverter drive systems were constructed and simulation results are present.

Performance Analysis of Multilevel Inverter with Reduced Number of Switches

2019 ◽  
Vol 16 (2) ◽  
pp. 422-427
Author(s):  
S. Karthikeyan ◽  
K. Lakshmi ◽  
S. Sivaranjani ◽  
J. Karthika ◽  
T. Nandhakumar
Keyword(s):  
Electromagnetic Interference ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Control Method ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Switching Frequency ◽  
Power Semiconductor ◽  
Multilevel Inverters ◽  
Modulation Control

Multilevel inverters are mainly used in high power and medium voltage applications to reduce the required voltage rating of the power semiconductor switching devices. Nowadays multilevel inverters are also preferred for various applications regardless of the power ratings because they can essentially realize lower harmonics with lower switching frequency and lower electromagnetic interference (EMI). However, it has some disadvantages such as increased number of components, complex Pulse Width Modulation control method, and voltage balancing problem. In this paper a new topology of cascaded multilevel inverter using reduced number of switches is introduced resulting in higher output voltage levels. There era five series connected H-bridges and the DC voltage is given in the ratio n0: n: n3:2n2:10n. The output voltage having 123 levels is obtained (61 positive voltage levels, 61 negative voltage levels and zero voltage levels). Reduced Total Harmonic Distortion (THD) makes them useful for electric vehicle, FACTS and has given option for various power applications. The proposed topology results in reduction of cost and has simplicity of control system. Therefore, the overall cost and complexity are greatly reduced particularly for higher output voltage levels.

scholarly journals Experimental validation of new self-voltage balanced 9L-ANPC inverter for photovoltaic applications

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
M. Jagabar Sathik ◽  
Dhafer J. Almakhles ◽  
N. Sandeep ◽  
Marif Daula Siddique
Keyword(s):  
Output Voltage ◽  
Pulse Width Modulation ◽  
Superior Performance ◽  
Modulation Scheme ◽  
Switching Frequency ◽  
Switched Capacitor ◽  
Renewable Energy Resources ◽  
High Quality ◽  
Multilevel Inverters ◽  
Blocking Voltage

AbstractMultilevel inverters play an important role in extracting the power from renewable energy resources and delivering the output voltage with high quality to the load. This paper proposes a new single-stage switched capacitor nine-level inverter, which comprises an improved T-type inverter, auxiliary switch, and switched cell unit. The proposed topology effectively reduces the DC-link capacitor voltage and exhibits superior performance over recently switched-capacitor inverter topologies in terms of the number of power components and blocking voltage of the switches. A level-shifted multilevel pulse width modulation scheme with a modified triangular carrier wave is implemented to produce a high-quality stepped output voltage waveform with low switching frequency. The proposed nine-level inverter’s effectiveness, driven by the recommended modulation technique, is experimentally verified under varying load conditions. The power loss and efficiency for the proposed nine-level inverter are thoroughly discussed with different loads.

scholarly journals Research on Modified Hybrid Frequency Modulation Technology of Type-III Asymmetric CHB Multilevel Inverters

Electronics ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 263
Author(s):  
Manyuan Ye ◽  
Wei Ren ◽  
Qiwen Wei ◽  
Guizhi Song ◽  
Zhilin Miao
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Low Voltage ◽  
Output Line ◽  
Line Voltage ◽  
Multilevel Inverters ◽  
Type Iii ◽  
Hybrid Frequency ◽  
Frequency Pulse

Asymmetric Cascaded H-bridge (ACHB) level inverters can output more voltage waveforms with fewer cascaded units while ensuring the quality of output voltage waveforms, so they have attracted more and more attention. Taking the topology of Type-III asymmetric CHB multilevel inverters as the research object, a Modified Hybrid Frequency Pulse Width Modulation (MHF-PWM) strategy is proposed in this paper. This modulation strategy overcomes the local overshoot of low-voltage unit in the presence of traditional Hybrid Frequency Pulse Width Modulation (HF-PWM), thus completely eliminating the low frequency harmonics in the output voltage waveform of Type-III ACHB nine-level inverters, and the Total Harmonic Distortion (THD) of output line voltage of the modulation strategy is lower than that of PS-PWM strategy in the whole modulation degree, which effectively improves the quality waveform of the output line voltage. At the same time, the strategy can also improve the problems of current backflow and energy feedback caused by the high-voltage unit pouring current to the low-voltage unit, thereby reducing the imbalance of the output power of the high-voltage and low-voltage units. Finally, the Matlab/Simulink simulation model and experimental platform are established to verify the validity and practicality of the modulation strategy.

Comparison of Switching Angle Arrangement Techniques in Single-Phase Boost Multilevel Inverter for Low-THD Operation

2015 ◽  
Vol 793 ◽  
pp. 167-171
Author(s):  
Mohd Aizuddin Yusof ◽  
Yee Chyan Tan ◽  
M. Othman ◽  
S.S. Lee ◽  
M.A. Roslan ◽  
...  
Keyword(s):  
Output Voltage ◽  
Single Phase ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Solar Photovoltaic ◽  
Voltage Waveform ◽  
Voltage Level ◽  
Software Simulation ◽  
Multilevel Inverters ◽  
Simulation Results

Multilevel inverters are one of the preferred inverter choices for solar photovoltaic (PV) applications. While these inverters are capable of producing AC staircase output voltage waveform, the total harmonic distortion (THD) of the output voltage waveform can become worse if the switching angle of each voltage level is not carefully chosen. In this paper, four switching angle arrangement techniques are presented and the switching angles generated by these techniques are applied to a new single-phase boost multilevel (SPBM) inverter. The performance of 3-, 5-, 7-, 9-and 11-level SPBM inverter having four different sets of switching angles derived using the aforementioned techniques have been evaluated and compared using PSIM software. Simulation results show that one of the techniques is able to produce an output voltage waveform with the lowest THD, whilst the other generates an output voltage waveform with the highest fundamental voltage component.

scholarly journals Improved reliable multilevel inverter for renewable energy systems

2019 ◽  
Vol 14 (3) ◽  
pp. 1141
Author(s):  
Sujatha M ◽  
A.K. Parvathy
Keyword(s):  
Renewable Energy ◽  
Simulation Model ◽  
Output Voltage ◽  
Energy Systems ◽  
Multilevel Inverter ◽  
Voltage Level ◽  
Renewable Energy Systems ◽  
Matlab Simulink ◽  
Multilevel Inverters ◽  
Main Drawback

<p>New improved multilevel inverter (MLI) topology for Renewable energy systems is proposed in this paper. Cascaded multilevel inverters (CMLI) produce an output voltage level depending on the number of individual sources connected. The main drawback of CMLI is, as the output voltage level increases in number, the switches used in the device also increases and hence the complexity of the circuit increases. As the number of switches increases, the reliability of the circuit decreases. In this paper a novel MLI topology, which employs lesser number of switches, is proposed. A simulation model of CMLI and the proposed MLI has been built in MATLAB/SIMULINK. The reliability of the CMLI and the new topology MLI is analyzed by using MIL-HDBK-217.  </p>

scholarly journals Multicarrier PWM Strategies for Hybrid Symmetrical Multilevel Inverter with Reduced Switch Count

2020 ◽  
Vol 9 (5) ◽  
pp. 860-866
Keyword(s):  
Electromagnetic Interference ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Switching Frequency ◽  
Third Harmonic ◽  
Multilevel Inverters ◽  
High Switching Frequency

Multilevel inverters are widely used for high power and high voltage applications. The performance of multilevel inverters are superior to conventional two level inverters in terms of reduced total harmonic distortion, higher dc link voltages, lower electromagnetic interference and increased quality in the output voltage waveform. This paper presents a single phase hybrid eleven level multilevel inverter topology with reduced switch count to compensate the above mentioned disadvantages. This paper also presents various high switching frequency based multi carrier pulse width modulation strategies such as Phase Disposition PWM Strategy (PDPWM), Phase Opposition and Disposition PWM Strategy (PODPWM), Alternate Phase opposition Disposition PWM (APODPWM), Carrier Overlapping PWM (COPWM), Variable frequency carrier PWM (VFPWM), Third Harmonic Injection PWM (TFIPWM) applied to the proposed eleven level multilevel inverter and is analyzed for RL load. FFT analysis is carried out and total harmonic distortion, fundamental output voltage are calculated. Simulation is carried out in MATLAB/SMULINK.

scholarly journals Design of new structure of multilevel inverter based on modified absolute sinusoidal PWM technique

2021 ◽  
Vol 12 (4) ◽  
pp. 2314
Author(s):  
Asef A. Saleh ◽  
Rakan Khalil Antar ◽  
Harith Ahmed Al-Badrani
Keyword(s):  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Power Circuit ◽  
Zero Level ◽  
Multilevel Inverters ◽  
Simulink Simulation ◽  
High Output Voltage ◽  
Sinusoidal Pulse Width Modulation

The advantage of multilevel inverters is to produce high output voltage values with distortion as minimum as possible. To reduce total harmonic distortion (THD) and get an output voltage with different step levels using less power electronics switching devices, 15-level inverter is designed in this paper. Single-phase 11-switches with zero-level (ZL) and none-zero-level (NZL) inverter based on modified absolute sinusoidal pulse width modulation (MASPWM) technique is designed, modelled and built by MATLAB/Simulink. Simulation results explained that, multilevel inverter with NZL gives distortion percent less than that with ZL voltage. The THD of the inverter output voltage and current of ZL are 4% and 1%, while with NZL is 3.6% and 0.84%, respectively. These results explain the effectiveness of the suggested power circuit and MASPWM controller to get the required voltage with low THD.

scholarly journals Implementation of the conventional seven-level single-phase symmetrical cascaded h-bridge MLI based on PSIM

2020 ◽  
Vol 11 (1) ◽  
pp. 169
Author(s):  
Hassan Salman Hamad
Keyword(s):  
Electromagnetic Interference ◽  
Output Voltage ◽  
Single Phase ◽  
Pulse Width Modulation ◽  
Feasible Solution ◽  
Harmonic Distortion ◽  
Operating Principle ◽  
Multilevel Inverters ◽  
Simulation Performance ◽  
Power Switches

<span>Researchers<strong> </strong>have found interest in the multilevel inverters (MLI) owing to the low total harmonic distortion (THD) associated with their output voltage, as well as their low electromagnetic interference (EMI). The MLI represents an effective and feasible solution for enhancing power demand and minimizing AC waveforms’ harmonics as they generate a preferred level of output voltage as inputs from varying levels of DC voltages. In this paper, the performance of a seven-level cascaded H-bridge MLI with an asymmetrical number of power switches was evaluated. The simulation performance is shown to validate the operating principle of the single-phase cascaded H-bridge inverter. To control the MLI, a pulse width modulation approach was utilized. The operating principle of the MLI was verified via simulation using PSIM software.</span>

Operation, Control and Verification of Seven-Level Quasi-Z-Source-Based T-Type Inverter

2019 ◽  
Vol 29 (02) ◽  
pp. 2050023
Author(s):  
Ramesh Rahul Jammy ◽  
Kirubakaran Annamalai ◽  
Chinmay Kumar Das
Keyword(s):  
Duty Cycle ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Voltage Level ◽  
Text Type ◽  
Control Schemes ◽  
Operation Control ◽  
Bidirectional Switches ◽  
And Control

In this paper, a novel seven-level Quasi-Z-Source-based [Formula: see text]-type inverter (7L[Formula: see text]qZST[Formula: see text]) is proposed. The proposed inverter is an upgrade of Quasi-Z-source (qZs) network and seven-level [Formula: see text]-type inverter. The 7L qZST[Formula: see text] comprises of three qZs-based impedance networks, two bidirectional switches and an [Formula: see text]-bridge inverter. It owns the advantages of reduced switch count, improved output voltage gain, enhanced reliability and better quality of output voltage and current. The performance of the proposed topology is tested for two different pulse width modulation techniques based on shoot-through control. The first technique offers simple control and operated at a fixed shoot-through duty cycle for realizing output voltage level. The second technique facilitates independent control of each qZs network dc-link voltage and they can be operated at different shoot through duty cycle which overcomes the limitation of first technique with better quality in output voltage. The detailed operation of the proposed topology and control schemes have been elaborated for different switching states for each output voltage level generation. Extensive simulation and experimentation are performed for both the switching schemes to verify their performance under steady state and dynamic conditions. Furthermore, a brief comparison is constructed to highlight the merits of the proposed inverter with conventional topologies.

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