Power and Vibration of Electrostatic Precipitator Control Based on FPGA

2014 ◽  
Vol 1037 ◽  
pp. 244-247
Author(s):  
Zi Sheng Zhang ◽  
Chun Sheng Wang ◽  
Yi Wang ◽  
Zhan You Wang ◽  
Deng Yuan Song
Keyword(s):  
Integrated Circuit ◽  
High Speed ◽  
Electrostatic Precipitator ◽  
Description Language ◽  
Simulation Test ◽  
High Voltage Power Supply ◽  
Optimization Control ◽  
Field Programmable ◽  
Hardware Description ◽  
Fpga Chip

In order to improve the automation level of the electrostatic precipitator, we used Very-High-Speed Integrated Circuit Hardware Description Language (VHDL) language to compile, emulate and optimize the control system of power source and vibration. In the design of Quartus platform, we used EP1C3T144C8 Field Programmable Gate Array (FPGA) chip to realize high voltage power supply, alarm and protection system. We also realized the compilation and simulation test of each part’s function of 20 s rapping and 40 min rapping cycle. At the same time, we recorded the waveform of simulation. It demonstrated that the validity of the relevant VHDL compilation. We used this method to achieve the optimization control of the electrostatic precipitator operating parameters. It has a strong practicability.

scholarly journals SYNTHESIS AND FPGA–IMPLEMENTATION BASED NEURAL TECHNIQUE OF A NONLINEAR ADC MODEL

2014 ◽  
pp. 27-33
Author(s):  
Mounir Bouhedda ◽  
Mokhtar Attari
Keyword(s):  
Integrated Circuit ◽  
Field Programmable Gate Array ◽  
High Speed ◽  
Hardware Description Language ◽  
Description Language ◽  
Analog To Digital ◽  
Field Programmable ◽  
Hardware Description ◽  
Nonlinear Analog ◽  
Very High

The aim of this paper is to introduce a new architecture using Artificial Neural Networks (ANN) in designing a 6-bit nonlinear Analog to Digital Converter (ADC). A study was conducted to synthesise an optimal ANN in view to FPGA (Field Programmable Gate Array) implementation using Very High-speed Integrated Circuit Hardware Description Language (VHDL). Simulation and tests results are carried out to show the efficiency of the designed ANN.

scholarly journals Support Vector Machine working on FPGA and the segmentation method of brain MR screening

2017 ◽  
Vol 4 (3) ◽  
pp. 120 ◽  
Author(s):  
Fatih Şişik ◽  
Eser Sert
Keyword(s):  
Integrated Circuit ◽  
Field Programmable Gate Array ◽  
High Speed ◽  
Hardware Description Language ◽  
Support Vector ◽  
Segmentation Method ◽  
Description Language ◽  
Field Programmable ◽  
Hardware Description ◽  
Very High

Alan Programlanabilir Kapı Dizileri (Field Programmable Gate Array-FPGA) programlanabilir sayısal bloklar ve bağlantılarını içeren cihazlar olup çok esnek ve hızlı çalışabilme özelliklerine sahiptir. Programlanabilen bu sayısal kapılar sayesinde karmaşık tasarımlar kolay bir şekilde geliştirilebilmektedir. FPGA’lar küçük boyutlarda olup bilgisayardan bağımsız mobil olarak ve bilgisayarlardan daha yüksek hızlarda çalışabilmektedirler. Veri madenciliğinin görevlerinden biri olan sınıflandırma probleminin çözümü için geliştirilmiş önemli makine öğrenimi algoritmalarından biri Destek Vektör Makineleri’ dir. Literatürde Destek Vektör Makineleri’ nin diğer birçok tekniğe göre daha başarılı sonuçlar verdiği kanıtlanmıştır. Tümör analizi, yüz tanıma, robotik göz oluşturma gibi konular, araştırmacıların görüntü işleme alanında yoğun olarak üzerinde çalıştıkları güncel, önemli ve zor problemlerden bazılarıdır. Bilgisayarda yapılan tümör analizinde, grafik ve resimlerin işlenmesinde yavaş işlem yapma ve aynı zamanda mobil olmama sorunlarından, FPGA donanımı ile görüntü işlemede bu sorunların üstesinden gelinmektedir. Bu çalışmada FPGA donanımında çalışan destek vektör makinası kullanılarak daha gerçekçi tümör analizi yapılarak tümörlü bölgelerin bulunması ve gerekli analiz sonuçlarının gösterilmesi amaçlanmaktadır. Böylece sağlık alanında da kullanılabilecek yararlı bir donanımın tasarımı gerçekleştirilecektir. Dolayısıyla gömülü sistemlerle anlatılan bu işlem süreçlerini gerçekleştiren çalışma sayısı çok az olduğundan çalışma özgün değer taşımaktadır. Buna ek olarak, FPGA’ ya özgü donanım tanımlama dillerinden biri olan Çok Yüksek Hızlı Tümleşik Devre Tanımlama Dili (Very High Speed Integrated Circuit  Hardware Description Language- VHDL) kullanılacaktır. Bölütleme sonucunun değerlendirilmesi için Uniformity Measure (UM) kullanılmıştır. UM değerlendirme sonucunun başarılı olduğu görülmüştür. Anahtar Kelimeler: Alan Programlanabilir Kapı Dizileri, FPGA, çok yüksek hızlı tümleşik devre tanımlama dili, vhdl, segmentasyon, destek vektör makinesi

The Control System of High Voltage Electrostatic Precipitator Based on FPGA

2013 ◽  
Vol 823 ◽  
pp. 528-531 ◽  
Author(s):  
Zi Sheng Zhang ◽  
Peng Bo Ge ◽  
Xiao Dong Shi ◽  
Bo Feng Liu ◽  
Zhi Qiang Liu
Keyword(s):  
Control System ◽  
High Voltage ◽  
Integrated Circuit ◽  
High Speed ◽  
Electrostatic Precipitator ◽  
Logic Device ◽  
High Voltage Power Supply ◽  
Control Module ◽  
Development Platform ◽  
Field Programmable

It is urgent to study a new control system for improving the efficiency of electrostatic precipitator. The System-on-a-Programmable-Chip (SOPC) development board, which belongs to the series of Cyclone of Altera Company, is used as the development platform. Analog Digital (AD) conversion module, voltage control module and overall control module of the electrostatic precipitator are designed and the simulation waveform of the system is analyzed, based on the programmable logic device EP1C12Q240C6 and Very-High-Speed Integrated Circuit Hardware Description Language (VHDL) programming language. The results show that: by using Field Programmable Gate Array (FPGA) as the control, transformation of AD is accurate and fast and high voltage power supply is stable, which leads to a certain value for generalization.

From Simulation to FPGA Control Circuit Implementation for Wind Power with Battery Charging

2012 ◽  
Vol 588-589 ◽  
pp. 777-780
Author(s):  
Cheng Shion Shieh
Keyword(s):  
Wind Power ◽  
Integrated Circuit ◽  
Field Programmable Gate Array ◽  
High Speed ◽  
Flow Chart ◽  
Charging Control ◽  
Field Programmable ◽  
Hardware Description ◽  
Fpga Chip ◽  
Gate Array

While application of field-programmable gate array (FPGA) chip has been extensively investigated, the charging control is relatively unexplored. This paper proposes a flow chart of energy storage for wind power system with Lead-Acid battery whose charging control is constructed by Very High Speed Integrated Circuit Hardware Description Language (VHDL) code. This research focuses on the proposed digital control algorithm can be directly downloaded into field-programmable gate array (FPGA) chip after simulation finishing. This saves greatly time on hardware circuit design. A simulation is presented to illustrate the effectiveness of the proposed charging flow chart.

scholarly journals Performance evaluation and analysis of 64-quadrature amplitude modulator using Xilinx Spartan FPGA

2018 ◽  
Vol 7 (2.8) ◽  
pp. 570
Author(s):  
Joseph Anthony Prathap ◽  
T S.Anandhi ◽  
K Ramash Kumar ◽  
B Srikanth
Keyword(s):  
Integrated Circuit ◽  
High Speed ◽  
Hardware Description Language ◽  
Description Language ◽  
Set Top Box ◽  
Field Programmable ◽  
Amplitude Modulator ◽  
Hardware Description ◽  
Cellular Technology ◽  
Very High

This paper proposes the design of 64-Quadrature Amplitude Modulation using the Very High Speed Integrated Circuit Hardware Description Language (VHDL) coding and XILINX SPARTAN Field Programmable Gate Array (FPGA) real-time implementation for validation. QAM is used in modern digital communication applications like set-top box, satellite TV, wireless and cellular technology etc. In this paper, 64-QAM is implemented and compared with three different XILINX SPARTAN FPGA devices say 3A DSP, 3E and 6E. The power, current and thermal parameters are performed and compared. The power consumed for the design of 64 QAM using the Xilinx SPARTAN 6E FPGA device is 0.014W and 15.9 C/W of Effective TJA for the XILINX SPARTAN 3A DSP FPGA. The device utilization of the 64-QAM design using the XILINX SPARTAN 3A DSP is low.

The Control of High Voltage Electrostatic Precipitator Based on EDA

2014 ◽  
Vol 910 ◽  
pp. 336-339
Author(s):  
Zi Sheng Zhang ◽  
Yi Wang ◽  
Chun Sheng Wang ◽  
Jin Cui ◽  
Zhi Qiang Liu
Keyword(s):  
Control System ◽  
High Voltage ◽  
Integrated Circuit ◽  
Design Automation ◽  
High Speed ◽  
Electrostatic Precipitator ◽  
Hardware Description Language ◽  
Description Language ◽  
Hardware Description ◽  
Very High

In order to achieve the automatic control of electrostatic precipitator (ESP) more efficiently and accurately, an ESP system combining hardware and software is designed. According to the requirement of the ESP system,the Electronic Design Automation (EDA) is introduced to the ESP control system and the system is divided into four modules.These sub-modules are designed and the simulation waveform of the system is ananalyzed,based on the Very-High-Speed Integrated Circuit Hardware Description Language (VHDL) programming language and Quartus software.The results show that the security, flexibility and reliabity of the system is improved by using EDA as the control ,which is a great value for generalization.

A modeling method of algorithm-hardware based on SysML

2021 ◽  
Author(s):  
Liu Yue ◽  
Zhao Chun ◽  
Zhang Lin
Keyword(s):  
Graphical Models ◽  
Integrated Circuit ◽  
High Speed ◽  
System Modeling ◽  
Modeling Method ◽  
Description Language ◽  
Hardware Description ◽  
Circuit And System ◽  
Graphical System ◽  
Hardware Circuit

In the process of complex product design, modeling in different fields and different disciplines is often involved. Designers often face many different development kits, platforms, and theories, among which significant differences exist. Especially in the process of algorithm-hardware implementation, it is necessary to have mastery of the knowledge including algorithm, hardware, circuit, and system engineering. In this paper, a modeling method of algorithm-hardware based on SysML is proposed to reduce the difficulty of algorithm-hardware modeling. By using the method, the designers who do not know the knowledge of hardware can also easily build the algorithm-hardware model. In this method, a method of graphical system modeling based on SysML is used, where the elements of the algorithm-hardware model are described by SysML graphical models. Then, the SysML graphical models are converted to Very-High-Speed Integrated Circuit Hardware Description Language. At last, a detecting algorithm of random number is complemented by the modeling method in this paper and the simulation results are presented at the conclusion.

FPGA-BASED MOTION CONTROLLER FOR WAFER-HANDLING ROBOT

2013 ◽  
Vol 37 (3) ◽  
pp. 427-437
Author(s):  
Hsin-Hung Chou ◽  
Ying-Shieh Kung ◽  
Tai-Wei Tsui ◽  
Stone Cheng
Keyword(s):  
Hardware Description Language ◽  
Motion Controller ◽  
Description Language ◽  
Gate Arrays ◽  
Current Vector ◽  
Field Programmable ◽  
Programmable Gate Arrays ◽  
Axis Position ◽  
Hardware Description ◽  
Fpga Chip

This study applies FPGA (Field Programmable Gate Arrays) technology to implement a motion controller for wafer-handling robot which has three-DOF (Degree of Freedom) motion. The proposed FPGA-based motion controller has two modules. The first module is Nios II processor which is used to realize the motion trajectory computation and the three-axis position/speed controllers. The second module is demonstrated to implement the three-axis current vector controllers by using FPGA hardware, and VHDL (VHSIC Hardware Description Language) is adopted to describe the controller behavior. Therefore, a fully digital motion controller for wafer-handling robot, such as one trajectory planning, three current vector controllers and three position/speed controllers are all implemented with an FPGA chip.

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