A new tapped sources stack succored modified HX bridge MLI

Circuit World ◽  
2020 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Kannan Chandrasekaran ◽  
Nalin Kant Mohanty ◽  
Selvarasu Ranganathan
Keyword(s):  
High Power ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Renewable Energy Sources ◽  
Harmonic Distortion ◽  
Content Type ◽  
Multiple Input ◽  
Field Programmable ◽  
Simulation And Experiment ◽  
Practical Implications

Purpose Multilevel inverter (MLI) is a prevailing sensible alternative to two-level inverters that offer a high-quality output voltage waveform, wherein the multiple input direct current (DC) levels are established by using isolated DC sources, batteries and renewable energy sources. The purpose of this paper is to develop MLI to offer lower total harmonic distortion (THD), higher output voltage levels and reduced switching components for high power applications. Design/methodology/approach In this paper, a new tapped sources stack succored modified HX bridge MLI (TSSSMHXBMLI) topology is proposed which includes two modules, such as tapped sources stack (TSS) and modified HX bridge inverter, which perform their function in a single stage. Also, this paper outlines the formulaic implementation of the multicarrier/sub-harmonic pulse width modulation (MCPWM/SHPWM) in a Xilinx Spartan3E-500 field programmable gate array (FPGA) is suitable for the developed MLI. Findings The feasibility of the suggested topology is well proved by both simulation and experiment results. Practical implications This paper examines a new topology of TSSSMHXBMLI with a view to minimize total count of switching components against basic MLI topologies. The operating sequence of the suggested TSSSMHXBMLI topology is verified with the simulation study followed by an experimental investigation. Originality/value The simulation and experimental results of suggested MLI topology reveals to obtain lower THD, higher output voltage levels and reduced switching components for high power applications.

A new three-phase multilevel DC-link inverter topology with reduced switch count for photovoltaic applications

Circuit World ◽  
2020 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Anbarasan P. ◽  
Krishnakumar V. ◽  
Ramkumar S. ◽  
Venkatesan S.
Keyword(s):  
Power Loss ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Photovoltaic Cell ◽  
Content Type ◽  
Energy Applications ◽  
Three Phase ◽  
Photovoltaic Applications ◽  
Inverter Topology

Purpose This paper aims to propose a new MLI topology with reduced number of switches for photovoltaic applications. Multilevel inverters (MLIs) have been found to be prospective for renewable energy applications like photovoltaic cell, as they produce output voltage from numerous separate DC sources or capacitor banks with reduced total harmonic distortion (THD) because of a staircase like waveform. However, they endure from serious setbacks including larger number of capacitors, isolated DC sources, associated gate drivers and increased control difficulty for higher number of voltage levels. Design/methodology/approach This paper proposes a new three-phase multilevel DC-link inverter topology overpowering the previously mentioned problems. The proposed topology is designed for five and seven levels in Matlab/Simulink with gating pulse using multicarrier pulse width modulation. The hardware results are shown for a five-level MLI to witness the viability of the proposed MLI for medium voltage applications. Findings The comparison of the proposed topology with other conventional and other topologies in terms of switch count, DC sources and power loss has been made in this paper. The reduction of switches in proposed topology results in reduced power loss. The simulation and hardware show that the output voltage yields a very close sinusoidal voltage and lesser THD. Originality/value The proposed topology can be extended for any level of output voltage which is helpful for sustainable source application.

Research on the High Frequency Realization of High-Power Inverter

2011 ◽  
Vol 383-390 ◽  
pp. 1077-1083
Author(s):  
Run Hua Liu ◽  
Gang Wang
Keyword(s):  
High Power ◽  
High Frequency ◽  
Output Voltage ◽  
Harmonic Distortion ◽  
Soft Switching ◽  
Multilevel Inverter ◽  
Switching Frequency ◽  
Switching Losses ◽  
Simulation And Experiment

The paper presents the inverter method which based on cascade multilevel inverter and MOSFET-assisted soft-switching of IGBT and modulation strategy against the double requirement of high-power inverter and high frequency. The method can effectively improve the output voltage, reduce harmonic distortion and switching losses, improve the switching frequency and meet the double requirement of the high-power inverter and high frequency. The method proved to be feasible by simulation and experiment.

scholarly journals Reconfiguration of a Multilevel Inverter with Trapezoidal Pulse Width Modulation

Energies ◽  
2018 ◽  
Vol 11 (8) ◽  
pp. 2148 ◽  
Author(s):  
Nataraj Prabaharan ◽  
V. Arun ◽  
Padmanaban Sanjeevikumar ◽  
Lucian Mihet-Popa ◽  
Frede Blaabjerg
Keyword(s):  
Root Mean Square ◽  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Mean Square ◽  
Distortion Factor ◽  
Field Programmable ◽  
Trapezoidal Pulse

This paper presents different multi-carrier unipolar trapezoidal pulse width modulation strategies for a reduced switch asymmetrical multilevel inverter. The different strategies are phase disposition, alternative phase opposition and disposition, and carrier overlapping and variable frequency that involve triangular waves as carriers with a unipolar trapezoidal wave as a reference. The reduced switch, asymmetrical multilevel inverter operation was examined for generating the seven-level output voltage using Matlab/Simulink 2009b and the results were verified with a real-time laboratory-based experimental setup using a field-programmable gate array. Different parameter analyses, such as total harmonic distortion, fundamental root mean square voltage, and distortion factor, were analyzed with different modulation indices to investigate the performance of the selected topology. Unipolar trapezoidal pulse width modulation provides a higher root mean square voltage value.

STUDY ON THE PERFORMANCE OF TWO TOPOLOGY MULTILEVEL INVERTER

2016 ◽  
Vol 78 (5-8) ◽  
Author(s):  
N.S.M. Nazar ◽  
S. Thanakodi ◽  
N.A. Othman ◽  
H.D.M. Hidzir ◽  
M.S. Mat
Keyword(s):  
High Power ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Harmonic Spectrum ◽  
Multilevel Inverter ◽  
Modulation Index ◽  
Multilevel Inverters ◽  
Voltage Output ◽  
Model And Simulation

It has been accepted that conventional inverters have limitation dealing with high voltage and high power applications. Lately, multilevel inverters are popular for high power applications due to its improved harmonic profile and increased power ratings. There are various literatures regarding topology and control techniques of multilevel inverters. This paper presents the performance of two Flying Capacitor Multilevel Inverter (FCMI) topologies particularly a 3-level and 5-level multilevel inverters. Besides that, concept of the topologies and its modulation techniques were described. Sinusoidal pulse width modulation (SPWM) techniques were utilized in this paper as the topologies control strategy. Two control parameters, namely the amplitude modulation index, ma and the frequency modulation index, mfwere varied in order to control the output voltage of the inverters. The model and simulation study were carried out using Matlab/Simulink software. Analyses on the performance of the two topologies were based on the fundamental voltage, output voltage waveform, output harmonic spectrum and total harmonic distortion (THD). It’s found that the five level FCMI have shown better performance in terms of THD compared to the three level FCMI in all conditions of varied ma and mf. Based on the study also, five level FCMI shows a better voltage output waveform; close to a sinusoidal waveform compared to the three level FCMI.

scholarly journals Design and Analyses of Multi-Carrier Pulse Width Modulation Techniques for Double Level Circuit Based Cascaded H-Bridge Multilevel Inverter

2021 ◽  
Vol 23 (2) ◽  
pp. 131-136
Author(s):  
Aneel Kumar Maheshwari ◽  
Mukhtiar Ahmed Mahar ◽  
Abdul Sattar Larik ◽  
Abdul Hameed Soomro
Keyword(s):  
Power Quality ◽  
High Power ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Voltage Waveform ◽  
Switching Losses ◽  
Symmetrical Model ◽  
Multi Level ◽  
Phase Arrangement

The paper introduces the cascaded H-Bridge multi-level inverter with single-phase arrangement connected series with full-bridge inverter and CHBMLI configuration integrated with Double level circuit is proposed to reduce the harmonic distortion to get high power quality. In the proposed configuration, a half-bridge inverter has been implemented to increase the output voltage waveform nearly twice as compared with the conventional Cascaded H-Bridge MLI. For high Power quality, the output voltage waveform with the reference of sinusoidal, the phase opposition disposition carrier arrangement has been utilized in PWM for producing gate pulse of switches. The high waveform of output voltage achieved with the less no of switches, less % THD distortion, less conduction and switching losses. The purposed symmetrical model of CHBMLI is successfully verified using MATLAB based on simulation with DLC configuration.

Simulation and dSPACE Based Implementation of Various PWM Strategies for A New H-Type FCMLI Topology

2015 ◽  
Vol 6 (3) ◽  
pp. 615
Author(s):  
Chinnapettai Ramalingam Balamurugan ◽  
S.P. Natarajan ◽  
T.S. Anandhi ◽  
B. Shanthi
Keyword(s):  
High Voltage ◽  
High Power ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Crest Factor ◽  
Third Harmonic ◽  
Switching Losses ◽  
Three Phase ◽  
Inverter Topology

<p>Depending on the number of levels in output voltage, inverters can be divided into two categories: two level inverter and Multi Level Inverters (MLIs). An inverter topology for high voltage and high power applications that seems to be gaining interest is the MLI. In high power and high voltage applications, the two level inverters have some limitations in operating at high frequency mainly due to switching losses and constraints of device rating.In this paper, a three phase H + type FCMLI (Flying Capacitor MLI) using sinusoidal reference, third harmonic injection reference, 60 degree reference and stepped wave reference are initially developed using SIMULINK and then implemented in real time environment using dSPACE. In H-type FCMLI with R-load it is inferred that bipolar COPWM-C provides output with relatively low distortion for 60 degree reference and bipolar COPWM-C strategy is found to perform better since it provides relatively higher fundamental RMS output voltage for THI reference. The five level output voltages of the chosen MLIs obtained using the MATLAB and dSPACE based PWM (Pulse Width Modulation) strategies and the corresponding %THD (Total Harmonic Distortion), V<sub>RMS</sub> (fundamental), CF (Crest Factor) and FF (Form Factor) are presented and analyzed.</p>

scholarly journals A Novel Single-Switch Single-Stage LED Driver with Power Factor Correction and Current Balancing Capability

Electronics ◽  
2021 ◽  
Vol 10 (11) ◽  
pp. 1340
Author(s):  
Yih-Her Yan ◽  
Hung-Liang Cheng ◽  
Chun-An Cheng ◽  
Yong-Nong Chang ◽  
Zong-Xun Wu
Keyword(s):  
Power Factor ◽  
High Power ◽  
Pulse Width Modulation ◽  
Power Factor Correction ◽  
Harmonic Distortion ◽  
Boost Converter ◽  
Single Stage ◽  
Led Driver ◽  
Flyback Converter ◽  
High Power Factor

A novel single-switch single-stage high power factor LED driver is proposed by integrating a flyback converter, a buck–boost converter and a current balance circuit. Only an active switch and a corresponding control circuit are used. The LED power can be adjusted by the control scheme of pulse–width modulation (PWM). The flyback converter performs the function of power factor correction (PFC), which is operated at discontinuous-current mode (DCM) to achieve unity power factor and low total current harmonic distortion (THDi). The buck–boost converter regulates the dc-link voltage to obtain smooth dc voltage for the LED. The current–balance circuit applies the principle of ampere-second balance of capacitors to obtain equal current in each LED string. The steady-state analyses for different operation modes is provided, and the mathematical equations for designing component parameters are conducted. Finally, a 90-W prototype circuit with three LED strings was built and tested. Experimental results show that the current in each LED string is indeed consistent. High power factor and low THDi can be achieved. LED power is regulated from 100% to 25% rated power. Satisfactory performance has proved the feasibility of this circuit.

scholarly journals Inverted sine carrier for fundamental fortification in PWM inverters and FPGA based implementations

2007 ◽  
Vol 4 (2) ◽  
pp. 171-187 ◽  
Author(s):  
S. Jeevananthan ◽  
R. Nandhakumar ◽  
P. Dananjayan
Keyword(s):  
Pulse Width Modulation ◽  
Reference Signal ◽  
Harmonic Distortion ◽  
Detailed Comparison ◽  
Modulation Index ◽  
Voltage Source ◽  
Fundamental Component ◽  
Switching Losses ◽  
Harmonic Content ◽  
Field Programmable

This paper deals with a novel natural sampled pulse width modulation (PWM) switching strategy for voltage source inverter through carrier modification. The proposed inverted sine carrier PWM (ISCPWM) method, which uses the conventional sinusoidal reference signal and an inverted sine carrier, has a better spectral quality and a higher fundamental component compared to the conventional sinusoidal PWM (SPWM) without any pulse dropping. The ISCPWM strategy enhances the fundamental output voltage particularly at lower modulation index ranges while keeping the total harmonic distortion (THD) lower without involving changes in device switching losses. The presented mathematical preliminaries for both SPWM and ISCPWM give a conceptual understanding and a comparison of the strategies. The detailed comparison of the harmonic content and fundamental component of the ISCPWM output for different values of modulation index with the results obtained for the SPWM is also presented. Finally, the proposed modulator has been implemented in field programmable gate array (FPGA- Xilinx Spartan 3) and tested with the proto-type inverter.

Spear phishing in organisations explained

2017 ◽  
Vol 25 (5) ◽  
pp. 593-613 ◽  
Author(s):  
Jan-Willem Bullee ◽  
Lorena Montoya ◽  
Marianne Junger ◽  
Pieter Hartel
Keyword(s):  
High Power ◽  
Design Methodology ◽  
Power Distance ◽  
Demographic Variables ◽  
Content Type ◽  
Awareness Campaigns ◽  
Personally Identifiable Information ◽  
High Power Distance ◽  
Effect Of Age ◽  
Practical Implications

Purpose The purpose of this study is to explore how the opening phrase of a phishing email influences the action taken by the recipient. Design/methodology/approach Two types of phishing emails were sent to 593 employees, who were asked to provide personally identifiable information (PII). A personalised spear phishing email opening was randomly used in half of the emails. Findings Nineteen per cent of the employees provided their PII in a general phishing email, compared to 29 per cent in the spear phishing condition. Employees having a high power distance cultural background were more likely to provide their PII, compared to those with a low one. There was no effect of age on providing the PII requested when the recipient’s years of service within the organisation is taken into account. Practical implications This research shows that success is higher when the opening sentence of a phishing email is personalised. The resulting model explains victimisation by phishing emails well, and it would allow practitioners to focus awareness campaigns to maximise their effect. Originality/value The innovative aspect relates to explaining spear phishing using four socio-demographic variables.

Reversing the endowment effect by empowering buyers and sellers

2018 ◽  
Vol 52 (9/10) ◽  
pp. 1827-1844 ◽  
Author(s):  
Eugene Chan ◽  
Najam Saqib
Keyword(s):  
Boundary Conditions ◽  
Low Power ◽  
High Power ◽  
Design Methodology ◽  
Endowment Effect ◽  
Process Data ◽  
Content Type ◽  
Gift Card ◽  
Practical Implications ◽  
Potential Moderator

Purpose The endowment effect is well-established in economics, psychology and marketing where sellers place a higher value on a good than buyers. One potential moderator, namely, power is explored. The authors predicted that feeling powerful can reverse the effect, making buyers place a higher value on a good than sellers. Design/methodology/approach The authors manipulated power to assess the effects on the valuation of three different products (keychain, gift card and iPhone case). They also assessed participants’ focus on parting with the good (money), which is a loss, and receiving money (the good), which is a gain, for sellers (buyers). Findings Feelings of power reduced sellers’ prices but they increased buyers’. Crucially, the authors observed the endowment effect, but only under conditions of low power. When participants had high power, the effect reversed, with buyers placing a higher value on the good under transaction than sellers. Process data indicated that powerful buyers and sellers focused on what they gained and less on what they lost, compared to powerless buyers and sellers. Research limitations/implications The authors link the construct of power with the endowment effect, showing that the former can moderate the latter. Certainly, the endowment effect is well-established, but there are moderators and boundary conditions that warrant consideration. Practical implications The results suggest a case where the market may clear, where buyers value a consumer product more than sellers, and thus buyers would likely accept the offer made by sellers. Originality/value The authors are the first to link the power literature with the endowment effect. They also show a possible moderator for the well-established endowment effect.

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