Study of High Temperature Microwave Annealing on the Performance of 4H-SiC MOS Capacitors

2012 ◽  
Vol 717-720 ◽  
pp. 769-772
Author(s):  
Harsh Naik ◽  
Z. Li ◽  
H. Issa ◽  
Y.L. Tian ◽  
T. Paul Chow
Keyword(s):  
High Temperature ◽  
Covalent Bond ◽  
Attractive Alternative ◽  
Mos Capacitors ◽  
Microwave Annealing ◽  
Annealing Conditions ◽  
Mos Devices ◽  
Strong Covalent Bond ◽  
Post Implantation ◽  
Channel Region

The strong covalent bond of SiC imposes harsh post implantation annealing condition requirement for SiC MOS devices. As a consequence the effect of the annealing conditions on the channel region of the MOS devices becomes critical. High temperature microwave annealing has been shown to be an attractive alternative to conventional thermal annealing techniques. The effect of high temperature rapid microwave annealing on the performance of 4H-SiC MOS capacitors has been studied in this paper. Annealing temperatures ranging from 1600°C up to 2000°C for 30secs is used and the effect of annealing conditions is studied via C-V measurements on MOS capacitors.

scholarly journals A Nanoscale Look in the Channel of 4H-SiC Lateral MOSFETs

2013 ◽  
Vol 740-742 ◽  
pp. 699-702 ◽  
Author(s):  
Patrick Fiorenza ◽  
Alessia Frazzetto ◽  
Lukas K. Swanson ◽  
Filippo Giannazzo ◽  
Fabrizio Roccaforte
Keyword(s):  
Dopant Concentration ◽  
Field Effect Mobility ◽  
Cross Sectional ◽  
Mos Capacitors ◽  
Capping Layer ◽  
Annealing Conditions ◽  
Nanoscale Measurements ◽  
P Type ◽  
Post Implantation ◽  
Channel Region

In this work the field effect mobility measured on lateral n-channel MOSFETs in 4H-SiC with Al implanted body was correlated with the interface trap density measured on MOS capacitors. The test devices were fabricated on samples subjected to different post implantation annealing conditions (i.e. with or without a protective carbon capping layer) and to an identical post-oxidation annealing in N2O. Despite the improved interfacial morphology, a reduction of the peak mobility (from 40 to 24 cm2V-1s-1) was observed using the carbon capping layer. An increase in the density of interface traps was consistently found. Nanoscale measurements of the active dopant concentration in the SiC channel region by cross-sectional scanning capacitance microscopy showed an higher compensation of p-type SiC for the sample processed without the capping layer, which indicates a more efficient incorporation of nitrogen at the SiO2/SiC interface.

Improved Electrical Properties of 4H-SiC MOS Devices with High Temperature Thermal Oxidation

2019 ◽  
Vol 954 ◽  
pp. 99-103
Author(s):  
Heng Yu Xu ◽  
Cai Ping Wan ◽  
Jin Ping Ao
Keyword(s):  
High Temperature ◽  
Thermal Oxidation ◽  
High Temperature Oxidation ◽  
Oxidation Temperature ◽  
Nitrogen Gas ◽  
Mos Capacitors ◽  
Temperature Oxidation ◽  
Mos Devices ◽  
Device Reliability ◽  
Nitrogen Ions

We reported that high oxidation temperature is attributed to break Si-C bond and release nitrogen gas to nitrogen ions over 1350°C. The capacitance-voltage characteristics of SiO2/4H-SiC (0001) MOS capacitors fabricated under different thermal oxidation conditions are compared. The dependence of oxidation temperature on device characteristics (such as VFB and ΔVFB) is also analyzed. After a high temperature oxidation, the device reliability of SiC MOS is improved. Such behavior can be attributed to the reduction of the interface traps during high temperature oxidation.

Characteristics of Phenomena in Powders Type RE2Zr2O7-Al2O3 in High Temperature Annealing Conditions

2011 ◽  
Vol 312-315 ◽  
pp. 583-588 ◽  
Author(s):  
Grzegorz Moskal ◽  
Lucjan Swadźba ◽  
Marek Hetmańczyk ◽  
Bartosz Witala
Keyword(s):  
High Temperature ◽  
Perovskite Oxide ◽  
Differential Scanning Calorimetric ◽  
Test Results ◽  
Dsc Analysis ◽  
Annealing Conditions ◽  
Before And After ◽  
Influence Of Temperature On ◽  
Dta Analysis ◽  
Type Bond

The paper presents test results and characterizes the structural stability of powders, which form a mixture of aluminium oxide (Al2O3) and gadolinium, based on rare earth zirconates. This mixture is provided to create thermal barrier coatings (TBCs) by spraying. The purpose of the tests was to determine the influence of temperature on reactions, occurring between those powders within a temperature range from 25°C to 1500°C, while such conditions were to simulate the conditions, which occur during creation of TBCs and they give an answer to the question concerning mutual reactivity of the powders. The requirements for new materials, provided to spray the TBCs, indicate the necessity to prepare the materials, which do not show tendency towards reactions with the Al2O3, formed during oxidation of Ni (Co) CrAlY, while this reaction is of type bond coat. The tests included differential scanning calorimetric (DSC) analysis and differential thermal analysis (DTA) of powder mixtures. Diffraction analysis was also performed before and after the tests have been finished. The DSC analysis results, obtained at a range of high temperature, did not show any thermal effects, which indicate a low level of mutual reactivity of the powders. However, the DTA analysis suggests presence of such effects at temperature close to 1300°C, and it indicates the necessity to verify exactly the obtained results. Results of the XRD measurement showed that after annealing process already at 1100°C the perovskite oxide of GdAlO3 was present.

A Comparison of Mos Devices with In-Situ Boron Doped Polysilicon and Poly Sige Gates Deposited in an Rtcvd System Using S12H6 and B2H6 Gas Mixture

1998 ◽  
Vol 525 ◽  
Author(s):  
M. R. Mirabedini ◽  
V. Z-Q Li ◽  
A. R. Acker ◽  
R. T. Kuehn ◽  
D. Venables ◽  
...  
Keyword(s):  
Flat Band ◽  
Gas Mixture ◽  
Mos Capacitors ◽  
Mos Devices ◽  
Boron Doped ◽  
Depletion Effect ◽  
Polysilicon Films ◽  
Sims Analysis ◽  
Boron Penetration

ABSTRACTIn this work, in-situ doped polysilicon and poly-SiGe films have been used as the gate material for the fabrication of MOS devices to evaluate their respective performances. These films were deposited in an RTCVD system using a Si2H6 and GeH4 gas mixture. MOS capacitors with 45 Å thick gate oxides and polysilicon/poly-SiGe gates were subjected to different anneals to study boron penetration. SIMS analysis and flat band voltage measurements showed much lower boron penetration for devices with poly-SiGe gates than for devices with polysilicon gates. In addition, C-V measurements showed no poly depletion effects for poly-SiGe gates while polysilicon gates had a depletion effect of about 8%. A comparison of resistivities of these films showed a low resistivity of 1 mΩ-cm for poly-SiGe films versus 3 mΩ-cm for polysilicon films after an anneal at 950 °C for 30 seconds.

The Formation of an Epitaxial-Graphene Cap Layer for Post-Implantation High Temperature Annealing of SiC and its In Situ Removal by Si-Vapor Etching

2011 ◽  
Vol 679-680 ◽  
pp. 777-780 ◽  
Author(s):  
Shoji Ushio ◽  
Ayumu Adachi ◽  
Kazuhiro Matsuda ◽  
Noboru Ohtani ◽  
Tadaaki Kaneko
Keyword(s):  
High Temperature ◽  
Graphene Layer ◽  
Treatment Method ◽  
Etch Depth ◽  
High Temperature Annealing ◽  
Large Area ◽  
Vapor Flux ◽  
Precise Control ◽  
Post Implantation

As a new graphene functionality applicable to post-implantation high temperature annealing of SiC, a method of in situ formation and removal of large area epitaxial few-layer graphene on 4H-SiC(0001) Si-face is proposed. It is demonstrated that the homogeneous graphene layer formed by Si sublimation can be preserved without the decomposition of the underlying SiC substrate even in the excess of 2000 oC in ultrahigh vacuum. It is due to the existence of the stable (6√3×6√3) buffer layer at the interface. To ensure this cap function, the homogeneity of the interface must be guaranteed. In order to do that, precise control of the initial SiC surface flatness is required. Si-vapor etching is a simple and versatile SiC surface pre/post- treatment method, where thermally decomposed SiC surface is compensated by a Si-vapor flux from Si solid source in the same semi-closed TaC container. While this Si-vapor etching allows precise control of SiC etch depth and surface step-terrace structures, it also provides a “decap” function to remove of the graphene layer. The surface properties after the each process were characterized by AFM and Raman spectroscopy.

Effect of NO annealing conditions on electrical characteristics of n-type 4H-SiC MOS capacitors

2000 ◽  
Vol 29 (8) ◽  
pp. 1027-1032 ◽  
Author(s):  
H. -F. Li ◽  
S. Dimitrijev ◽  
D. Sweatman ◽  
H. B. Harrison
Keyword(s):  
Electrical Characteristics ◽  
Mos Capacitors ◽  
Annealing Conditions

scholarly journals Moisture-Resistant Sealing Materials for Downhole HPHT Electrical Feedthrough Package

2019 ◽  
Vol 16 (3) ◽  
pp. 141-148
Author(s):  
Hua Xia ◽  
Nelson Settles ◽  
David DeWire
Keyword(s):  
High Temperature ◽  
Water Immersion ◽  
Electrical Power ◽  
Covalent Bond ◽  
Phase Structures ◽  
Sealing Material ◽  
Drilling Tools ◽  
Measurement While Drilling ◽  
Sealing Materials ◽  
Moisture Resistant

Abstract A bismuth oxide–based multicomponent glass system, xH3BO3-yBi2O3-(1-x-y-δ)MO-δ· rare earth oxides (REOs) with MO = TiO2, BaO, ZnO, Fe2O3, etc., and lanthanum series–based REOs, for making downhole high-pressure and high-temperature electrical feedthrough package has been developed using high-temperature melt-quenching and sintering technologies. By properly controlling phase structures in material-manufacturing processes, the obtained sealing materials have shown moisture-resistant properties in their monoclinic and tetragonal mixed phase structures but strongly hydrophobic properties in their covalent bond tetragonal phase. Sealed electrical feedthrough packages have been evaluated under boiling water immersion and 200°C/30,000 PSI water-fluid–simulated downhole harsh environments. The post electrical insulation measurement has demonstrated to be greater than 1.0 × 1014 Ω electrical resistance. This article will show that such a high–bonding strength and high–insulation strength sealing material could be used to seal electrical feed-throughs and connectors for 300°C/30,000 PSI downhole and subsea wireline, logging while drilling, and measurement while drilling tools' signal, data, and electrical power transmissions.

The Correlation between the Reduction of Interface State Density at the SiO2/SiC Interface and the NO Post-Oxide-Annealing Conditions

2019 ◽  
Vol 954 ◽  
pp. 104-108
Author(s):  
Heng Yu Xu ◽  
Cai Ping Wan ◽  
Jin Ping Ao
Keyword(s):  
Mass Spectrometry ◽  
Secondary Ion Mass Spectrometry ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Mos Capacitors ◽  
Annealing Conditions ◽  
N Concentration ◽  
Higher Temperature ◽  
Secondary Ion

We fabricated SiO2/4H-SiC (0001) MOS capacitors with oxidation temperature at 1350°C, followed by post-oxide-annealing (POA) in NO simply by the control of POA temperatures and times. A correlation between the reduction of interface state density and the increasing of N concentration at the interface has been indicated by C-ψs measurement and secondary ion mass spectrometry (SIMS). The SiO2/4H-SiC interface density decreased when POA temperature was elevated, and the sample annealed at 1300°C for 30min showed the lowest interface state density about 1.5×1012 cm-2eV-1 at Ec-E=0.3 eV when the N concentration is 11.5×1020 cm-3. Meanwhile, the SiO2 /4H-SiC interface annealed at 1200°C for 120min showed the highest N concentration at the 4H-SiC/SiO2 interface is 12.5×1020 cm-3, whereas the interface state density is 2.5×1012 cm-2eV-1 at Ec-E=0.3 eV higher than 1300°C for 30min. The results suggested that higher temperature POA might be much more efficiency in decreased the 4H-SiC MOS interface density with increasing the N area concentration.

Investigations of Crystalline Phases in Glasses under Various Annealing Conditions

2020 ◽  
Vol 28 ◽  
pp. 14-19
Author(s):  
Zamir V. Shomakhov ◽  
Akhmed M. Karmokov ◽  
Oleg A. Molokanov ◽  
Olga O. Molokanova ◽  
Rita Y. Karmokova ◽  
...  
Keyword(s):  
High Temperature ◽  
Structural Changes ◽  
Irreversible Processes ◽  
High Temperature Annealing ◽  
X Ray Diffraction ◽  
Structural And Phase Transformations ◽  
X Ray ◽  
Air Atmosphere ◽  
Annealing Conditions ◽  
Microchannel Plates

Studies of the temperature dependence of the electrical properties of glasses show that the high-temperature annealing in glasses observed irreversible processes. These processes lead to changes in electrical conductivity, dielectric permittivity, and hence the electrical capacitance, dielectric loss tangent, and other parameters. Obviously, this is due to structural changes in the glass as a result of high-temperature annealing. In this regard, this paper presents studies of structural and phase transformations in glasses used for the production of microchannel plates in the process of high-temperature annealing in vacuum and in the air atmosphere at different times. The studies were conducted by x-ray phase and X-ray diffraction analysis, as well as X-ray fluorescence elemental analysis.

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