20 kV 4H-SiC N-IGBTs

2014 ◽  
Vol 778-780 ◽  
pp. 1030-1033 ◽  
Author(s):  
Sei Hyung Ryu ◽  
Craig Capell ◽  
Charlotte Jonas ◽  
Michael J. O'Loughlin ◽  
Jack Clayton ◽  
...  
Keyword(s):  
Buffer Layer ◽  
Leakage Current ◽  
Supply Voltage ◽  
Boost Converter ◽  
Power Switching ◽  
Switching Device ◽  
Blocking Voltage ◽  
Off Time ◽  
Drift Layer ◽  
Stop Buffer

A 1 cm x 1 cm 4H-SiC N-IGBT exhibited a blocking voltage of 20.7 kV with a leakage current of 140 μA, which represents the highest blocking voltage reported from a semiconductor power switching device to this date. The device used a 160 μm thick drift layer and a 1 μm thick Field-Stop buffer layer, and showed a VF of 6.4 V at an IC of 20 A, and a differential Ron,sp of 28 mΩ-cm2. Switching measurements with a supply voltage of 8 kV were performed, and a turn-off time of 1.1 μs and turn-off losses of 10.9 mJ were measured at 25°C, for a 8.4 mm x 8.4 mm device with 140 μm drift layer and 2 μm F-S buffer layer. The turn-off losses were reduced by approximately 50% by using a 5 μm F-S buffer layer. A 55 kW, 1.7 kV to 7 kV boost converter operating at 5 kHz was demonstrated using the 4H-SiC N-IGBT, and an efficiency value of 97.8% was reported.

15 kV IGBTs in 4H-SiC

2013 ◽  
Vol 740-742 ◽  
pp. 954-957 ◽  
Author(s):  
Sei Hyung Ryu ◽  
Craig Capell ◽  
Charlotte Jonas ◽  
Michael J. O'Loughlin ◽  
Lin Cheng ◽  
...  
Keyword(s):  
Buffer Layer ◽  
High Voltage ◽  
Room Temperature ◽  
Charge Injection ◽  
Active Area ◽  
Gate Bias ◽  
Temperature Differential ◽  
Blocking Voltage ◽  
Chip Size ◽  
Stop Buffer

The latest developments in ultra high voltage 4H-SiC IGBTs are presented. A 4H-SiC P-IGBT, with a chip size of 8.4 mm x 8.4 mm and an active area of 0.32 cm2, which is double the active area of the previously reported devices [1], exhibited a blocking voltage of 15 kV, while showing a room temperature differential specific on-resistance of 41 mΩ-cm2 with a gate bias of -20 V. A 4H-SiC N-IGBT with the same area showed a blocking voltage of 17 kV, and demonstrated a room temperature differential specific on-resistance of 25.6 mΩ-cm2 with a gate bias of 20 V. Field-Stop buffer layer design was used to control the charge injection from the backside. A comparison between N- and P- IGBTs, and the effects of different buffer designs, are presented.

Lifetime Control of the Minority Carrier in PiN Diodes by He+ Ion Implantation

2005 ◽  
Vol 483-485 ◽  
pp. 985-988 ◽  
Author(s):  
Yasunori Tanaka ◽  
Kazutoshi Kojima ◽  
Kazuto Takao ◽  
Mitsuo Okamoto ◽  
Megumi Kawasaki ◽  
...  
Keyword(s):  
Ion Implantation ◽  
Leakage Current ◽  
Doping Concentration ◽  
Minority Carrier ◽  
Pin Diodes ◽  
Blocking Voltage ◽  
Different Characteristics ◽  
Drift Layer

This paper reports the first demonstration of the lifetime control of the minority carrier in 4H-SiC PiN diodes by He+ ion implantation. In this work, we fabricated 4H-SiC PiN diodes with the epitaxial junction and the blocking voltage of 2.6kV, precisely corresponding to the theoretical blocking voltage calculated from the doping concentration (4.0x1015/cm2) and the thickness of the drift layer (16.5 µm). He+ ion implantation was performed with the energy and the dose of 400kV and 1.0x1013-2.0x1014/cm2, respectively. We observed no different characteristics in the blocking voltage (2.6kV) and leakage current (<10µ[email protected]) between the PiN diodes with/without He+ ion implantation. However, we confirmed the improvement of the current recovery characteristics in the diodes with He+ ion implantation.

scholarly journals Active Clamp Boost Converter with Blanking Time Tuning Considered

2021 ◽  
Vol 11 (2) ◽  
pp. 860
Author(s):  
Yeu-Torng Yau ◽  
Kuo-Ing Hwu ◽  
Yu-Kun Tai
Keyword(s):  
Boost Converter ◽  
Zero Current Switching ◽  
Active Clamp ◽  
Overall Efficiency ◽  
Auto Tuning ◽  
Voltage Spike ◽  
Resonant Inductor ◽  
Off Time ◽  
Conduction Mode ◽  
Time Point

An active clamp boost converter with blanking time auto-tuned is presented herein, and this is implemented by an additional auxiliary switch, an additional resonant inductor, and an additional active clamp capacitor as compared with the conventional boost converter. In this structure, both the main and auxiliary switches have zero voltage switching (ZVS) turn-on as well as the output diode has zero current switching (ZCS) turn-off, causing the overall efficiency of the converter to be upgraded. Moreover, as the active clamp circuit is adopted, the voltage spike on the main switch can be suppressed to some extent whereas, because of this structure, although the input inductor is designed in the continuous conduction mode (CCM), the output diode can operate with ZCS turn-off, leading to the resonant inductor operating in the discontinuous conduction mode (DCM), hence there is no reverse recovery current during the turn-off period of the output diode. Furthermore, unlike the existing soft switching circuits, the auto-tuning technique based on a given look-up table is added to adjust the cut-off time point of the auxiliary switch to reduce the current flowing through the output diode, so that the overall efficiency is upgraded further. In this paper, basic operating principles, mathematic deductions, potential designs, and some experimental results are given. To sum up, the novelty of this paper is ZCS turn-off of the output diode, DCM operation of the resonant inductor, and auto-tuning of cut-off time point of the auxiliary switch. In addition, the efficiency of the proposed converter can be up to 96.9%.

Research on a Next-generation Power Semiconductor: a GaN HFET Power Switching Device

2015 ◽  
Vol 65 (1) ◽  
pp. 1-13 ◽  
Author(s):  
Seung Yup JANG* ◽  
Sung-Woon MOON ◽  
Jinhong PARK
Keyword(s):  
Next Generation ◽  
Power Switching ◽  
Switching Device ◽  
Power Semiconductor ◽  
Gan Hfet ◽  
Generation Power

Improved Reverse Leakage Current in GaInN-Based LEDs With a Sputtered AlN Buffer Layer

2019 ◽  
Vol 31 (24) ◽  
pp. 1971-1974
Author(s):  
Dong-Pyo Han ◽  
Seiji Ishimoto ◽  
Ryoya Mano ◽  
Weifang Lu ◽  
Motoaki Iwaya ◽  
...  
Keyword(s):  
Buffer Layer ◽  
Leakage Current ◽  
Reverse Leakage Current ◽  
Aln Buffer

scholarly journals Device Design Assessment of GaN Merged P-i-N Schottky Diodes

Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1550 ◽  
Author(s):  
Yuliang Zhang ◽  
Xing Lu ◽  
Xinbo Zou
Keyword(s):  
Breakdown Voltage ◽  
Computer Aided Design ◽  
Schottky Diodes ◽  
Schottky Contact ◽  
Background Concentration ◽  
Model Parameters ◽  
Design Assessment ◽  
Blocking Voltage ◽  
Aided Design ◽  
Drift Layer

Device characteristics of GaN merged P-i-N Schottky (MPS) diodes were evaluated and studied via two-dimensional technology computer-aided design (TCAD) after calibrating model parameters and critical electrical fields with experimental proven results. The device’s physical dimensions and drift layer concentration were varied to study their influence on the device’s performance. Extending the inter-p-GaN region distance or the Schottky contact portion could enhance the forward conduction capability; however, this leads to compromised electrical field screening effects from neighboring PN junctions, as well as reduced breakdown voltage. By reducing the drift layer background concentration, a higher breakdown voltage was expected for MPSs, as a larger portion of the drift layer itself could be depleted for sustaining vertical reverse voltage. However, lowering the drift layer concentration would also result in a reduction in forward conduction capability. The method and results of this study provide a guideline for designing MPS diodes with target blocking voltage and forward conduction at a low bias.

scholarly journals Performance enhancement analysis of an isolated DC-DC converter using fuzzy logic controller

2017 ◽  
Vol 7 (1.2) ◽  
pp. 186 ◽  
Author(s):  
S. Muthu Balaji ◽  
R. Anand ◽  
P. Senthil Pandian
Keyword(s):  
Fuzzy Logic ◽  
High Voltage ◽  
Output Voltage ◽  
Fuzzy Logic Controller ◽  
Performance Enhancement ◽  
Supply Voltage ◽  
Boost Converter ◽  
Open Loop ◽  
Voltage Gain ◽  
Power Application

High voltage gain dc-dc converters plays an major role in many modern industrialized applications like PV and fuel cells, electrical vehicles, dc backup systems (UPS, inverter), HID (high intensity discharge) lamps. As usual boost converter experiences a drawback of obtaining a high voltage at maximum duty cycle. Hence in order to increase the voltage gain of boost converter, this paper discusses about the advanced boost converter using solar power application. By using this technique, boost converter attains a high voltage which is ten times greater than the input supply voltage. The output voltage can be further increased to more than ten times the supply voltage by using a parallel capacitor and a coupled inductor. The voltage stress across the switch can be reduced due to high output voltage. The Converter is initially operated in open loop and then it is connected with closed loop. More over the fuzzy logic controller is used for the ripple reduction.

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