Impact of Device Structure on Neutron-Induced Single-Event Effect in SiC MOSFETs

Neutron single event effect (SEE) tolerance of SiC power MOSFETs with different drift region design were evaluated. The SEE is detected over the SEE threshold voltage (VSEE). The failure rate increases exponentially as the drain voltage increases above VSEE. The device with higher avalanche breakdown voltage has higher SEE threshold voltage. The neutron SEE tolerance of MOSFETs and PiN diodes of the same epitaxial structure were also evaluated. There was no significant difference in the neutron SEE tolerance of these devices.

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Effect of Electron Irradiation on 1700V 4H-SiC MOSFET Characteristics

Materials Science Forum ◽

10.4028/www.scientific.net/msf.858.856 ◽

2016 ◽

Vol 858 ◽

pp. 856-859 ◽

Cited By ~ 4

Author(s):

Stanislav Popelka ◽

Pavel Hazdra

Keyword(s):

Electron Irradiation ◽

Threshold Voltage ◽

Low Dose ◽

Dose Range ◽

Drift Region ◽

Static Characteristics ◽

Electron Dose ◽

Deep Acceptor ◽

Power Mosfets ◽

Final Failure

The effect of 4.5 MeV electron irradiation on static characteristics of commercially available 5 A/1700 V SiC power MOSFETs is investigated. Results show that in the low dose range (up to 20 kGy) the threshold voltage decreases rapidly with irradiation dose but devices keep full functionality. This effect is caused by embedding of the positive charge into the gate oxide. When electron dose reaches 200 kGy, the threshold voltage moves back close to its original value, however, the ON‑state resistivity increases and transconductance is lowered. This is caused by introduction of deep acceptor centers into the low doped drift region of MOSFET. This effect can be considered as a cause of the final failure of the device (the lost of the ON-state capability).

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Mechanisms of Heavy Ion-Induced Single Event Burnout in 4H-SiC Power MOSFETs

Materials Science Forum ◽

10.4028/www.scientific.net/msf.1004.889 ◽

2020 ◽

Vol 1004 ◽

pp. 889-896

Author(s):

Joseph McPherson ◽

Collin W. Hitchcock ◽

T. Paul Chow ◽

Wei Ji ◽

Andrew Woodworth

Keyword(s):

Electric Field ◽

Field Effect ◽

Impact Ionization ◽

Field Effect Transistors ◽

Heavy Ion ◽

Metal Oxide Semiconductor ◽

Oxide Semiconductor ◽

Single Event ◽

Power Mosfets ◽

Single Event Effect

This paper describes the mechanisms behind the failure of silicon carbide (SiC) Power MOSFETs (metal oxide semiconductor field effect transistors) when struck by a heavy ion. The modeled device is designed to simulate a commercially available 1200 V power MOSFET under the strike of a silver ion with a Linear Energy Transfer (LET) of 46 MeV-cm2/mg commonly used in single event effect (SEE) testing. The device is shown in simulation to fail near 500 V, which is in close agreement to experiments. The failure occurs near the interface between the epitaxial layer and the substrate layer due to the rapid increase of the electric field in that region and destruction of the device from impact ionization. Two improved designs were proposed and investigated that would help to mitigate the electric field in these regions and improve the device’s tolerance to single-event burnout (SEB). The new designs increased the voltage at which SEB occurs from 500 V to over 900 V and increased the specific on-resistance (Ron,sp) by only 5%.

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The Threshold Voltage Degradation of MOSFET in Heavy-ion Single Event Effect Test

2018 International Conference on Radiation Effects of Electronic Devices (ICREED) ◽

10.1109/icreed.2018.8905067 ◽

2018 ◽

Author(s):

Zeming Zhang ◽

Yingqi Ma ◽

Dan Li ◽

Chao Tong ◽

Xiaoxiao Guo ◽

...

Keyword(s):

Threshold Voltage ◽

Heavy Ion ◽

Single Event ◽

Single Event Effect ◽

Voltage Degradation ◽

Effect Test ◽

Threshold Voltage Degradation

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Single Event Effect Characteristics Analysis of Typical Circuit Elements in Spacecraft Power Systems

Volume 7: Fuel Cycle, Decontamination and Decommissioning, Radiation Protection, Shielding, and Waste Management; Mitigation Strategies for Beyond Design Basis Events ◽

10.1115/icone25-67728 ◽

2017 ◽

Author(s):

Zhao Wen ◽

He Chaohui ◽

Chen Wei ◽

Guo Xiaoqiang ◽

Cong Peitian ◽

...

Keyword(s):

Power Systems ◽

Circuit Simulation ◽

Behavioral Modeling ◽

Single Event ◽

Single Event Transient ◽

Power Mosfets ◽

Single Event Effect ◽

Characteristics Analysis ◽

Circuit Elements ◽

Serial Conversion

Single event effect occurs when a single energetic particle penetrates sensitive nodes and deposits enough charge by ionization in semiconductor devices. It has become a major reliability concern for spaceflight. Single event effect characteristics analysis methods based on simulation are presented for typical circuit elements in spacecraft power systems. The failure mechanism and impact factors of single event burnout in trench power MOSFETs are investigated through numerical simulation. The broadening, quenching and capture of single event transients in combinational logics are analyzed by circuit simulation based on a coupled single event transient injection method. A behavioral modeling is introduced to predict single event effect sensitivity of the parallel to serial conversion circuit. The results show that ion-induced holes can spread efficiently to turn on the parasitic bipolar junction transistor and result in stronger carrier multiplication when the ion strikes at the center of the gate region in trench power MOSFETs. Increasing the depth of P+ plugs, decreasing the doping concentration of source regions and using lower drain bias voltages can mitigate single event burnout susceptibility. Using the same load capacitance for each stage inverter and selecting a suitable gate-width ratio are recommended to prevent single event transient broadening in inverter chains. Moreover, the reset pin of D flip-flops in the parallel to serial conversion circuit should be hardened by design according to the behavioral modeling results.

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VLSI for Space Applications—Single Event Effect Investigation and Optical Analysis on an Integrated Laser Platform

ISTFA 2017: Conference Proceedings from the 43rd International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2017p0621 ◽

2017 ◽

Author(s):

Samuel Chef ◽

Chung Tah Chua ◽

Yu Wen Siah ◽

Philippe Perdu ◽

Chee Lip Gan ◽

...

Keyword(s):

Pulsed Laser ◽

Single Event ◽

Optical Analysis ◽

Space Applications ◽

Laser Probing ◽

Single Event Effect ◽

Evaluation Time ◽

Black Boxes ◽

System Use ◽

First Time

Abstract Today’s VLSI devices are neither designed nor manufactured for space applications in which single event effects (SEE) issues are common. In addition, very little information about the internal schematic and usually nothing about the layout or netlist is available. Thus, they are practically black boxes for satellite manufacturers. On the other hand, such devices are crucial in driving the performance of spacecraft, especially smaller satellites. The only way to efficiently manage SEE in VLSI devices is to localize sensitive areas of the die, analyze the regions of interest, study potential mitigation techniques, and evaluate their efficiency. For the first time, all these activities can be performed using the same tool with a single test setup that enables a very efficient iterative process that reduce the evaluation time from months to days. In this paper, we will present the integration of a pulsed laser for SEE study into a laser probing, laser stimulation, and emission microscope system. Use of this system will be demonstrated on a commercial 8 bit microcontroller.

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Critical Technical Issues in High Voltage SiC Power Devices

Materials Science Forum ◽

10.4028/www.scientific.net/msf.600-603.895 ◽

2008 ◽

Vol 600-603 ◽

pp. 895-900 ◽

Cited By ~ 14

Author(s):

Anant K. Agarwal ◽

Albert A. Burk ◽

Robert Callanan ◽

Craig Capell ◽

Mrinal K. Das ◽

...

Keyword(s):

Threshold Voltage ◽

Carrier Mobility ◽

Negative Charge ◽

State Of The Art ◽

Power Devices ◽

Power Mosfets ◽

Large Numbers ◽

Technical Issues ◽

The Difference ◽

Difficult Issue

In this paper, we review the state of the art of SiC switches and the technical issues which remain. Specifically, we will review the progress and remaining challenges associated with SiC power MOSFETs and BJTs. The most difficult issue when fabricating MOSFETs has been an excessive variation in threshold voltage from batch to batch. This difficulty arises due to the fact that the threshold voltage is determined by the difference between two large numbers, namely, a large fixed oxide charge and a large negative charge in the interface traps. There may also be some significant charge captured in the bulk traps in SiC and SiO2. The effect of recombination-induced stacking faults (SFs) on majority carrier mobility has been confirmed with 10 kV Merged PN Schottky (MPS) diodes and MOSFETs. The same SFs have been found to be responsible for degradation of BJTs.

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