ENEP – A Cost-Effective Alternative for High Reliability Soldering Applications

2010 ◽  
Vol 2010 (DPC) ◽  
pp. 002190-002224
Author(s):  
Gustavo Ramos ◽  
Mustafa Oezkoek ◽  
Sven Lamprecht ◽  
Hugh Roberts

Electroless nickel / immersion gold (ENIG) has been recognized within the electronics packaging industry as a reliable surface finish for soldering applications. Unlike surface finishes, such as OSP, immersion silver or immersion tin, which produce a Cu-Sn intermetallic upon soldering, the nickel layer of ENIG acts as a barrier to minimize copper dissolution during the soldering application. This function is especially important for assemblies that require multiple reflow steps. However, if not properly controlled, excessive corrosion of the nickel by the immersion gold step can also cause the well documented “black pad” effect, often resulting in solder joint reliability issues, including brittle fracture. As an alternative to ENIG, an electroless pure palladium layer over the electroless nickel (ENEP) provides a solderable surface without the noted risk of damage to the underling nickel layer. By eliminating the corrosive attack of the gold bath, the final layer stack would be suitable for high reliability soldering involving both IC substrate and PWB applications. In addition, because of the current high price of gold, replacing it with a pure palladium deposit can offer measureable cost savings for the ENEP process in comparison to ENIG. The paper summarizes an in-depth study of the effect on solder joint reliability caused by replacing the immersion gold by an electroless pure palladium layer. The study includes evaluations for both Pb-free (Sn-3.0Ag-0.5Cu) and eutectic SnPb (63Sn-37Pb) soldering applications. Results of investigations include: (1) cold ball pull testing to evaluate solder joint integrity, (2) SEM examinations of the underlying nickel surface, (3) IMC examinations to quantify nickel thickness degradation after multiple solder reflow cycles and (4) surface wetting through solder spread examinations. The paper discusses the relatively simple surface finish that, if proven effective in large-scale fabrication, may offer measureable performance and cost benefits in comparison to the more traditional ENIG finish.

2018 ◽  
Vol 2018 (1) ◽  
pp. 000104-000109
Author(s):  
Mollie Benson ◽  
Burton Carpenter ◽  
Andrew Mawer

Abstract Radar is currently employed in automotive applications to provide the range, angle, and velocity of objects using RF waves (77GHz). This paper outlines solder joint reliability of a specific micro-processor that processes data received from a SRR (short range radar operating from 0.2 to 30 meters). It is a powerful digital signal processing accelerator, which targets safety applications that require a high Automotive Safety Integrity Level (ASIL-B). The paper explores the package design and construction, SMT (surface mount technology) assembly, and board level reliability testing of various BGA pad surface finish and solder ball alloy materials on a 0.65 mm pitch, 10 × 10 mm body 141 MAPBGA (mold array process-ball grid array) package. The package configurations include two BGA pad surface finishes (Ni/Au and OSP [organic solderability protectant]) and three solder alloys (SnAg, SAC405, and SAC-Bi [a Bi containing SAC derivative]). Solder joint reliability analysis was performed through AATS (air-to-air thermal shock) between 40°C and +125°C and JEDEC Drop Testing at 1500G's. Thermal shock was extended until at least 75% of the populations failed, which was well past the points needed to qualify the packages for the intended end-use applications. The evaluations of the micro-processor indicate that the MAPBGA package can meet the ASIL-B specification requirements with optimized combinations of BGA pad surface finish and solder alloy. The focus of this paper was to determine the baseline solder-joint thermal shock and JEDEC drop performance with varied BGA pad surface finish and solder ball alloy materials.


Author(s):  
Kanji Takagi ◽  
Qiang Yu ◽  
Tadahiro Shibutani ◽  
Hiroki Miyauchi

The miniaturization and high reliability for automotive electronic components has been strongly requested. Generally, electronic component and printed wiring board are connected using solder joint. The reliability of solder joint has widely dispersion. For the dispersion reduction of solder joint reliability, not only design factors but manufacturing factors should be optimized. The evaluation of manufacturing factors for solder joint reliability was very difficult by experimental evaluation alone. Therefore, the reflow process simulation was established. The simulation was reenacted soldering process on chip component, which was the most severe reliability in automotive electronic components. The novelty of simulation was the coupled analysis of flow and rigid for simulating self-alignment of chip component. In this simulation, contact angle and surface tension was very important factor. So, these characteristics were measured based on Spread test and Wetting balance tests using the specimens. In the result, the solder joint shape of analysis was agree with the one of specimens using the measured contact angle and surface tension. Next, the effect of manufacturing process dispersion for solder joint shape was evaluated. The factors were mount offset and length unbalance of electrodes on chip component. As a result, the mount offset was not affected solder joint shape of chip component until a certain level. Also, the unbalance of electrode of chip component was not almost affected for solder joint shape of chip component because a part was moved to the center of part by surface tension of solder joint. Finally, the relation between the estimated solder joint shape and fatigue life of solder joints is evaluated using crack propagation analysis based on Manson-Coffin’s law and Miner’s rule. When the value of mount offset was large, the crack propagation mode was changed and the fatigue life of solder joint was decreased. As mentioned above, it was able to evaluate the relation between manufacturing factors and solder joint reliability. Accordingly, this simulation was very useful for consideration on the miniaturization, high reliability and appropriate margin for design of electronic components.


2012 ◽  
Vol 2012 (DPC) ◽  
pp. 000542-000553
Author(s):  
Betty H. Yeung ◽  
Torsten Hauck ◽  
Brett Wilkerson ◽  
Thomas Koschmieder

The solder joint reliability of semiconductor package interconnects is critical to product durability. A dominant failure mode is solder fatigue due to the CTE mismatch between BGA component and PCB at thermal cycling. It is well known that besides thermal expansion mismatch of component and board, the solder joint geometry has a great impact on fatigue behavior and time to failure. In this study, a combination of Surface Evolver and finite element analysis are use to predict the solder joint shapes for the assembly of medium pin count BGA's and to estimate the reliability at accelerated temperature cycling conditions. Results of Surface Evolver are compared with the assumption of a truncated sphere. The solder shape predictions are applied for a subsequent thermo-mechanical analysis of the BGA assembly. Inelastic creep deformation is evaluated for critical solder balls, and the Coffin-Manson relation is used to estimate the solder joint lifetime. The entire simulation procedure will be demonstrated for a product design study for high reliability automotive BGA's. A fractional factorial design is defined that considers solder sphere diameter and solder pad sizes on BGA substrate and on PCB side. Resulting creep values and lifetime estimates will be compared.


Author(s):  
George F. Raiser ◽  
Dudi Amir

The various methods for improvement of package solder joint reliability (SJR) have centered on the broad categories of (i) reductions in the thermomechanical and mechanical stresses and strains applied to the joints, and (ii) strengthening of the solder interconnect interfaces and materials themselves. In practice, the success of the former depends first and foremost on the latter — an adequate and consistent interconnect ‘strength’ during the package development and production cycles. With the advancement of various pad-plating technologies (most notably ENIG – Electroless Nickel Immersion Gold), sphere chemistries, fluxes and processing conditions, each with their own stability issues, the interconnect strengths can easily undergo seemingly random drifts over time. The Dage™ Cold Ball Pull (CBP) technique, however, has emerged as an attractive alternative to the traditional ball-shear metrology as an interconnect strength monitor. The open issues preventing its adoption are related to identifying the best test conditions (e.g. aging time, pull speed, jaw pressure, etc...), all of which are addressed here. After identifying the best test conditions, we present a number of experimental results that highlight the powerful capability of this tool for optimizing and monitoring solder-joint strength. A full metrology characterization to demonstrate accuracy, repeatability and reproducibility has been performed. Moreover, interesting results have been obtained with respect to solder-aging, multiple-reflow, and time-above-liquidus effects on interconnect strength. Examples of direct correlation between CBP measurements and solder-joint shock performance are demonstrated. CBP is also shown to correlate well to other strength metrologies, such as three-point bend. Finally, CBP is used here to show how to strengthen interconnects by the proper selection of pad plating chemistries, sphere compositions, fluxes, reflow conditions, etc… Maintaining those strengths through development and production can be handled effectively using CBP as a monitor. Looking forward, CBP data presented here shows that certain material and processing choices can maximize lead-free solder interconnect strength and lead-free solder joint reliability.


Author(s):  
Richard John Nichols

Increasing IO counts have led to ever increasing solder performance expectations. A predominant measure of solder joint integrity is gained through HSS testing. This article will statistically evaluate the solderability of final finishes after substrate and IMC ageing. Lead free solder balls will be used in this exercise to simulate lead free production. The finishes selected are: Immersion tin, Organic Surface Protection (OSP), Electroless Nickel/ Immersion Gold (ENIG), Electroless Nickel /Electroless Palladium and Immersion Gold (ENEPIG) and Electroless Palladium / semi Autocatalytic Gold (EPAG). Where necessary, the adaptions of the final finishes will be included for testing. An example of this is ENEPIG with thin nickel. This is a measure to enable high frequency and or improve flexibility. For the purpose of the paper, the evaluation will endeavor to relate HSS performance and physical and chemical characteristics of the related deposit layer. To ensure that a comparative analysis is possible, an “as received” (ASR) population will be used as a base line. This fully data driven evaluation will aim to increase the understanding of key indicators that can ensure good quality soldering performance. In the field, there are assertions that the IMC is a good indicator of the solder joint integrity. However this is usually as far as this particular statement is taken. A key question that is still outstanding is what particular attribute of the IMC is important for solder joint reliability. The shape and size of the IMC is often cited as crucial to quality assurance. Such indicators may be valid but this study will couple this kind of observation with elemental quantification (EDX), high resolution microscopy and finally mechanical failure techniques. A comprehensive test plan will be executed to more fully understand the role of IMC formation in terms of solder joint reliability, (SJR).


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