High Precision Analog Multiplexers Enable Multi-Channel Data Acquisition in High Temperature Environments

2016 ◽  
Vol 2016 (HiTEC) ◽  
pp. 000035-000039
Author(s):  
Jeff Watson ◽  
Stephen Kavanagh ◽  
Stephen Nugent
Keyword(s):  
Integrated Circuits ◽  
Low Power ◽  
Data Acquisition ◽  
High Performance ◽  
Single Channel ◽  
Low Voltage ◽  
Precision Data ◽  
Analog To Digital ◽  
Low Leakage ◽  
Analog To Digital Conversion

Abstract A growing number of industries are calling for low power electronics that operate reliably at temperatures of 175C and higher. Many of these applications require a precision data acquisition signal chain in order to digitize analog data so that it can be collected and processed. We previously presented a characterized signal chain for a single channel of analog to digital conversion designed around a 600ks ps SAR ADC. However, many systems have a multitude of sensor signals that must be acquired at varying sample rates. In this work we discuss two new analog multiplexers rated for 175°C/210°C that allow multiple analog signals to be connected to the ADC input, enabling the design of a precision multi-channel data acquisition system. One multiplexer is designed on a robust dielectrically isolated process for high performance and low leakage over temperature, and one multiplexer is optimized for low power, low voltage applications. We will examine the architecture of these two integrated circuits, review the characterization over temperature and discuss example application signal chains.

A Low Power, Precision SAR Analog to Digital Converter for High Temperature Applications

2014 ◽  
Vol 2014 (HITEC) ◽  
pp. 000053-000057
Author(s):  
Jeff Watson ◽  
Maithil Pachchigar
Keyword(s):  
Integrated Circuits ◽  
Low Power ◽  
High Performance ◽  
High Reliability ◽  
Data Converters ◽  
Analog To Digital Converter ◽  
Digital Converter ◽  
Data Converter ◽  
Precision Data ◽  
Analog To Digital

A growing number of industries are calling for low power electronics that operate reliably at temperatures of 175°C and higher. Many of these applications require a precision data acquisition signal chain in order to digitize analog data so that it can be collected and processed. Designing circuits that meet these needs can be very challenging, requiring a data converter that can deliver high performance and reliability in these harsh environments. There are currently a very limited number of integrated circuits commercially available that are specified for operation at these temperatures, and no low power precision data converters with sample rates greater than 100kSPS. This paper presents a new 210°C rated precision analog to digital converter capable of sample rates up to 600 kSPS with 16 bit resolution while maintaining low power consumption and packaged in a small form factor. We will explore the converter architecture of this ADC, present initial test results, and show how high reliability is achieved through qualification and advanced packaging techniques.

Analysis and Simulation of a Low-Leakage Analog Single Gate and FinFET Circuits

2014 ◽  
Vol 13 (02) ◽  
pp. 1450012 ◽  
Author(s):  
Manorama Chauhan ◽  
Ravindra Singh Kushwah ◽  
Pavan Shrivastava ◽  
Shyam Akashe
Keyword(s):  
Integrated Circuits ◽  
Metal Oxide ◽  
Low Power ◽  
High Performance ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Short Channel ◽  
State Dependency ◽  
Low Leakage

In the world of Integrated Circuits, complementary metal–oxide–semiconductor (CMOS) has lost its ability during scaling beyond 50 nm. Scaling causes severe short channel effects (SCEs) which are difficult to suppress. FinFET devices undertake to replace usual Metal Oxide Semiconductor Field Effect Transistor (MOSFETs) because of their better ability in controlling leakage and diminishing SCEs while delivering a strong drive current. In this paper, we present a relative examination of FinFET with the double gate MOSFET (DGMOSFET) and conventional bulk Si single gate MOSFET (SGMOSFET) by using Cadence Virtuoso simulation tool. Physics-based numerical two-dimensional simulation results for FinFET device, circuit power is presented, and classifying that FinFET technology is an ideal applicant for low power applications. Exclusive FinFET device features resulting from gate–gate coupling are conversed and efficiently exploited for optimal low leakage device design. Design trade-off for FinFET power and performance are suggested for low power and high performance applications. Whole power consumptions of static and dynamic circuits and latches for FinFET device, believing state dependency, show that leakage currents for FinFET circuits are reduced by a factor of over ~ 10X, compared to DGMOSFET and ~ 20X compared with SGMOSFET.

scholarly journals Analog to Digital Converters (ADC): A Literature Review

2020 ◽  
Vol 184 ◽  
pp. 01025
Author(s):  
Hemlata Dalmia ◽  
Sanjeet K. Sinha
Keyword(s):  
Signal Processing ◽  
Low Power ◽  
Communication Technology ◽  
High Performance ◽  
Reducing Power ◽  
Digital Signal ◽  
Analog To Digital Converters ◽  
Analog To Digital ◽  
Cmos Scaling ◽  
Analog To Digital Conversion

The signal processing is advancing day by day as its needs and in wireline/wireless communication technology from 2G to 4G cellular communication technology with CMOS scaling process. In this context the high-performance ADCs, analog to digital converters have snatched the attention in the field of digital signal processing. The primary emphasis is on low power approaches to circuits, algorithms and architectures that apply to wireless systems. Different techniques are used for reducing power consumption by using low power supply, reduced threshold voltage, scaling of transistors, etc. In this paper, we have discussed the different types and different techniques used for analog to digital conversion of signals considering several parameters.

An Ultra-Low-Voltage Low-Power Current-Mode True RMS-to-DC Converter

2016 ◽  
Vol 25 (06) ◽  
pp. 1650066 ◽  
Author(s):  
Pantre Kompitaya ◽  
Khanittha Kaewdang
Keyword(s):  
Integrated Circuits ◽  
Low Power ◽  
High Performance ◽  
Dynamic Range ◽  
Low Voltage ◽  
Supply Voltage ◽  
Circuit Complexity ◽  
Current Mode ◽  
Cmos Technology ◽  
Low Supply Voltage

A current-mode CMOS true RMS-to-DC (RMS: root-mean-square) converter with very low voltage and low power is proposed in this paper. The design techniques are based on the implicit computation and translinear principle by using CMOS transistors that operate in the weak inversion region. The circuit can operate for two-quadrant input current with wide input dynamic range (0.4–500[Formula: see text]nA) with an error of less than 1%. Furthermore, its features are very low supply voltage (0.8[Formula: see text]V), very low power consumption ([Formula: see text]0.2[Formula: see text]nW) and low circuit complexity that is suitable for integrated circuits (ICs). The proposed circuit is designed using standard 0.18[Formula: see text][Formula: see text]m CMOS technology and the HSPICE simulation results show the high performance of the circuit and confirm the validity of the proposed design technique.

Development of high k/III-V (InGaAs, InAs, InSb) structures for future low power, high speed device applications

2013 ◽  
Vol 1538 ◽  
pp. 291-302
Author(s):  
Edward Yi Chang ◽  
Hai-Dang Trinh ◽  
Yueh-Chin Lin ◽  
Hiroshi Iwai ◽  
Yen-Ku Lin
Keyword(s):  
Low Power ◽  
Leakage Current ◽  
High Speed ◽  
High Performance ◽  
Gate Oxide ◽  
Chemical Cleaning ◽  
Low Leakage ◽  
Low Leakage Current ◽  
High K ◽  
Cleaning Methods

ABSTRACTIII-V compounds such as InGaAs, InAs, InSb have great potential for future low power high speed devices (such as MOSFETs, QWFETs, TFETs and NWFETs) application due to their high carrier mobility and drift velocity. The development of good quality high k gate oxide as well as high k/III-V interfaces is prerequisite to realize high performance working devices. Besides, the downscaling of the gate oxide into sub-nanometer while maintaining appropriate low gate leakage current is also needed. The lack of high quality III-V native oxides has obstructed the development of implementing III-V based devices on Si template. In this presentation, we will discuss our efforts to improve high k/III-V interfaces as well as high k oxide quality by using chemical cleaning methods including chemical solutions, precursors and high temperature gas treatments. The electrical properties of high k/InSb, InGaAs, InSb structures and their dependence on the thermal processes are also discussed. Finally, we will present the downscaling of the gate oxide into sub-nanometer scale while maintaining low leakage current and a good high k/III-V interface quality.

Design and Layout of a High-Performance PWM Control Class D Amplifiers IC Systems

2012 ◽  
Vol 203 ◽  
pp. 469-473
Author(s):  
Ruei Chang Chen ◽  
Shih Fong Lee
Keyword(s):  
Low Power ◽  
High Performance ◽  
Low Voltage ◽  
Design Flow ◽  
Total Power ◽  
Cmos Process ◽  
Low Power Circuits ◽  
Class D ◽  
Total Power Consumption ◽  
Power Circuits

This paper presents the design and implementation of a novel pulse width modulation control class D amplifiers chip. With high-performance, low-voltage, low-power and small area, these circuits are employed in portable electronic systems, such as the low-power circuits, wireless communication and high-frequency circuit systems. This class D chip followed the chip implementation center advanced design flow, and then was fabricated using Taiwan Semiconductor Manufacture Company 0.35-μm 2P4M mixed-signal CMOS process. The chip supply voltage is 3.3 V which can operate at a maximum frequency of 100 MHz. The total power consumption is 2.8307 mW, and the chip area size is 1.1497×1.1497 mm2. Finally, the class D chip was tested and the experimental results are discussed. From the excellent performance of the chip verified that it can be applied to audio amplifiers, low-power circuits, etc.

scholarly journals Modified Low Power Binary to Excess Code Converter

2015 ◽  
Vol 4 (03) ◽  
pp. 06-10
Author(s):  
Ms. Mayuri Ingole
Keyword(s):  
Integrated Circuits ◽  
Low Power ◽  
High Performance ◽  
Major Aspect ◽  
Code Converter ◽  
Ripple Carry Adder ◽  
Carry Select Adder ◽  
The One

Utilization of power is a major aspect in the design of integrated circuits. Since, adders are mostly employed in these circuits, we should design them effectively. Here, we propose an easy and effective method in decreasing the maximum consumption of power. Carry Select Adder is the one which is dependent on the design of two adders. We present a high performance low-power adder that is implemented. Also, here in Carry Select Adder, Binary Excess Code-1is replaced by Ripple Carry Adder. After analyzing the results, we can come to a conclusion that the architecture which is proposed will have better results in terms of consumption of power compared to conventional techniques. 

Sign in / Sign up

Export Citation Format

Share Document