scholarly journals A Novel Neutral Point Clamped Full-Bridge Topology for Transformerless Photovoltaic Grid-Connected Inverters

2017 ◽  
Vol 7 (2) ◽  
pp. 1460-1463
Author(s):  
M. Pakdel ◽  
S. Jalilzadeh
Keyword(s):  
Theoretical Analysis ◽  
Leakage Current ◽  
Output Voltage ◽  
Neutral Point ◽  
Simulation Studies ◽  
Power Losses ◽  
Lower Power ◽  
Common Mode Voltage ◽  
The Common ◽  
Bus Voltage

This paper presents a novel neutral point clamped full-bridge topology for transformerless photovoltaic grid-tied inverters. Transformerless grid-connected inverters have been used widely in recent years since they offer higher efficiency and lower costs. Ground leakage current suppression is the main issue which should be considered carefully in transformerless photovoltaic grid-connected inverters. Among different methods used to decline ground leakage current, neutral point clamped (NPC) topologies are considered more useful and effective. In NPC topologies, the short-circuited output voltage at the freewheeling period is clamped to the middle of the DC bus voltage. Therefore, the common-mode voltage (CM) will be constant at the whole switching period. Various NPC topologies such as H6 [1], HB-ZVR [2], oH5 [3], and PN-NPC [4] have been proposed. In this paper, a novel NPC topology is proposed which has lower power losses and higher efficiency over previous topologies. Furthermore, the proposed NPC topology exhibits a similar ground leakage current with the PN-NPC topology. The proposed NPC topology is analyzed theoretically using simulation studies and an experimental prototype is provided to verify theoretical analysis and simulation studies.

scholarly journals Transformerless Quasi-Z-Source Inverter to Reduce Leakage Current for Single-Phase Grid-Tied Applications

Electronics ◽  
2019 ◽  
Vol 8 (3) ◽  
pp. 312 ◽  
Author(s):  
Woo-Young Choi ◽  
Min-Kwon Yang
Keyword(s):  
Leakage Current ◽  
Power Efficiency ◽  
High Performance ◽  
Single Phase ◽  
Power Devices ◽  
Common Mode Voltage ◽  
Control Scheme ◽  
Frequency Components ◽  
The Common ◽  
Current Reduction

The conventional single-phase quasi-Z-source (QZS) inverter has a high leakage current as it is connected to the grid. To address this problem, this paper proposes a transformerless QZS inverter, which can reduce the leakage current for single-phase grid-tied applications. The proposed inverter effectively alleviates the leakage current problem by removing high-frequency components for the common-mode voltage. The operation principle of the proposed inverter is described together with its control strategy. A control scheme is presented for regulating the DC-link voltage and the grid current. A 1.0 kW prototype inverter was designed and tested to verify the performance of the proposed inverter. Silicon carbide (SiC) power devices were applied to the proposed inverter to increase the power efficiency. The experimental results showed that the proposed inverter achieved high performance for leakage current reduction and power efficiency improvement.

scholarly journals Modeling and Modulation of NNPC Four-Level Inverter for Solar Photovoltaic Power Plant

2017 ◽  
Vol 2017 ◽  
pp. 1-8 ◽  
Author(s):  
Xiaoqiang Guo ◽  
Xuehui Wang ◽  
Ran He ◽  
Mehdi Narimani
Keyword(s):  
Power Plant ◽  
Neutral Point ◽  
Multilevel Inverter ◽  
Solar Photovoltaic ◽  
Common Mode ◽  
Practical Applications ◽  
Common Mode Voltage ◽  
Photovoltaic Power ◽  
The Common ◽  
Conventional Solution

Photovoltaic (PV) power plant is an attractive way of utilizing the solar energy. For high-power PV power plant, the multilevel inverter is of potential interest. In contrast to the neutral-point clamped (NPC) or flying capacitor (FC) multilevel inverter, the nested neutral point clamped (NNPC) four-level inverter has better features for solar photovoltaic power plant. In practical applications, the common mode voltage reduction of the NNPC four-level is one of the important issues. In order to solve the problem, a new modulation strategy is proposed to minimize the common mode voltage. Compared with the conventional solution, our proposal can reduce the common mode voltage to 1/18 of the DC bus voltage. Moreover, it has the capability to balance the capacitor voltages. Finally, we carried out time-domain simulations to test the performance of the NNPC four-level inverter.

scholarly journals A Five-Level Converter in a Three-Level Mode for Common-Mode Leakage Current Suppression in PV-Generation Systems

Electronics ◽  
2021 ◽  
Vol 10 (19) ◽  
pp. 2382
Author(s):  
Aleksey V. Udovichenko ◽  
Sergey V. Brovanov ◽  
Evgeny V. Grishanov ◽  
Svetlana M. Stennikova
Keyword(s):  
Leakage Current ◽  
Pulse Width Modulation ◽  
Renewable Energy Sources ◽  
Multilevel Converter ◽  
Generation System ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Modulation Mode ◽  
The Common ◽  
Pv Generation

Power generation systems (PGSs) based on renewable energy sources are finding ever-widening applications, and many researchers work on this problem. Many papers address the problem of transformerless PGSs, but few of them aimed at conducting research on structures with multilevel converter topologies as part of a PGS. In this paper a grid-tied transformerless PV-generation system based on a multilevel converter is discussed. There are common-mode leakage currents (CMLCs), which act as a parasitic factor. It is also known that common-mode voltage is the main cause of the common-mode leakage current in grid-tied PV-generation systems. This paper considers the space vector pulse-width modulation (PWM) technique, which is used to suppress or reduce common-mode leakage current. The proposed PWM technique with the reduction of common-mode leakage current for a generation system based on the multilevel converter controlled with a PWM technique was verified experimentally. The experimental results accurately confirmed the mathematical model and the compensation achieved without errors. In the experiment, there was an approximately six-fold decrease in the common-mode leakage current (10.3 mA in rejection mode and 61 mA in non-rejection current). This can lead to the elimination of CMLC in a multilevel semiconductor converter only by changing the modulation mode. This suggests the possibility of using these devices as part of transformerless generation systems. Suppression of CMLC can only be carried out by changing the PWM algorithm. Both considered topologies can implement this mode of operation. The proposed converter has a higher efficiency up to a frequency multiplicity of 2000.

scholarly journals Multilevel neutral point clamped/H-bridge inverters with sinusoidal pulse width modulation

2021 ◽  
Author(s):  
Arifur Rahman Shohel
Keyword(s):  
Computer Simulation ◽  
Theoretical Analysis ◽  
High Power ◽  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Neutral Point ◽  
Medium Voltage ◽  
Modulation Technique ◽  
Sinusoidal Pulse Width Modulation

This project focuses on the topology of multilevel neutral point clamped (NPC)/H-bridge inverters and their modified modulation technique for high-power (megawatts) medium voltage (typically 6000 v) applications. A sinusodial pulse width in-phase disposition modulation is proposed for five-level NPC/H-bridge inverters. The inverter achieves good harmonic performance and low dv/dt in its output voltage waveforms in comparison to the conventional three-level NPC inverter. A seven-level NPC/H-bridge topology and its sinusodial pulse width in-phase disposition modulation are also proposed and investigated, which has better performance than the five-level inverters. Theoretical analysis and computer simulation are carried out for the proposed inverter topologies and algorithms. The output voltage waveforms and harmonic performance are verified by experiments on a five-level NPC/H-bridge inverters.

scholarly journals Carrier-Based Common Mode Voltage Control Techniques in Three-Level Diode-Clamped Inverter

2012 ◽  
Vol 2012 ◽  
pp. 1-12 ◽  
Author(s):  
Pradyumn Chaturvedi ◽  
Shailendra Jain ◽  
Pramod Agarwal
Keyword(s):  
Output Voltage ◽  
Harmonic Distortion ◽  
Comparison Method ◽  
Rate Of Change ◽  
Common Mode ◽  
Multilevel Inverters ◽  
Common Mode Voltage ◽  
Voltage Signal ◽  
Comparable Performance ◽  
The Common

Switching converters are used in electric drive applications to produce variable voltage, variable frequency supply which generates harmful large dv/dt and high-frequency common mode voltages (CMV). Multilevel inverters generate lower CMV as compared to conventional two-level inverters. This paper presents simple carrier-based technique to control the common mode voltages in multilevel inverters using different structures of sine-triangle comparison method such as phase disposition (PD), phase opposition disposition (POD) by adding common mode voltage offset signal to actual reference voltage signal. This paper also presented the method to optimize the magnitude of this offset signal to reduce CMV and total harmonic distortion in inverter output voltage. The presented techniques give comparable performance as obtained in complex space vector-based control strategy, in terms of number of commutations, magnitude, and rate of change of CMV and harmonic profile of inverter output voltage. Simulation and experimental results presented confirm the effectiveness of the proposed techniques to control the common mode voltages.

Control of Indirect Matrix Converter by Using Improved SVM Method

2015 ◽  
Vol 6 (2) ◽  
pp. 370
Author(s):  
Lavanya Nannapaneni ◽  
Venu Gopala Rao
Keyword(s):  
Output Voltage ◽  
Harmonic Distortion ◽  
Matrix Converter ◽  
Space Vector Modulation ◽  
Font Size ◽  
Switching Sequence ◽  
Common Mode Voltage ◽  
The Common ◽  
Improved Performance ◽  
Vector Modulation

<span style="font-family: &quot;TimesNewRoman,Bold&quot;,&quot;Arial&quot;; font-size: 9pt;">A novel space vector modulation (SVM) method for an indirect matrix converter (IMC) is used to reduce the common -mode voltage (CMV) in the output. The process of selecting required active vectors and to describe the switching sequence in the inverter stage of the IMC is explained in this paper. This novel SVM method used to decrease the peak -to-peak amplitude voltage of CMV without using any external hardware. The other advantage of this SVM method is to reduce the total harmonic distortion of line-to-line output voltage. This new modulation technique is easily implemented through simulation and its results are used to demonstrate the improved performance of the input/output waveforms.</span>

scholarly journals Leakage Current Reduction in Single-Phase Grid-Connected Inverters—A Review

2020 ◽  
Vol 10 (7) ◽  
pp. 2384 ◽  
Author(s):  
Adyr A. Estévez-Bén ◽  
Alfredo Alvarez-Diazcomas ◽  
Gonzalo Macias-Bobadilla ◽  
Juvenal Rodríguez-Reséndiz
Keyword(s):  
Leakage Current ◽  
Harmonic Distortion ◽  
Clean Energy ◽  
Photovoltaic Module ◽  
Common Mode ◽  
Advantages And Disadvantages ◽  
Common Mode Voltage ◽  
The Common ◽  
Ac Converters ◽  
Current Reduction

The rise in renewable energy has increased the use of DC/AC converters, which transform the direct current to alternating current. These devices, generally called inverters, are mainly used as an interface between clean energy and the grid. It is estimated that 21% of the global electricity generation capacity from renewable sources is supplied by photovoltaic systems. In these systems, a transformer to ensure grid isolation is used. Nevertheless, the transformer makes the system expensive, heavy, bulky and reduces its efficiency. Therefore, transformerless schemes are used to eliminate the mentioned disadvantages. One of the main drawbacks of transformerless topologies is the presence of a leakage current between the physical earth of the grid and the parasitic capacitances of the photovoltaic module terminals. The leakage current depends on the value of the parasitic capacitances of the panel and the common-mode voltage. At the same time, the common-mode voltage depends on the modulation strategy used. Therefore, by the manipulation of the modulation technique, is accomplished a decrease in the leakage current. However, the connection standards for photovoltaic inverters establish a maximum total harmonic distortion of 5%. In this paper an analysis of the common-mode voltage and its influence on the value of the leakage current is described. The main topologies and strategies used to reduce the leakage current in transformerless schemes are summarized, highlighting advantages and disadvantages and establishing points of comparison with similar topologies. A comparative table with the most important aspects of each converter is shown based on number of components, modes of operation, type of modulation strategy used, and the leakage current value obtained. It is important to mention that analyzed topologies present a variation of the leakage current between 0 to 180 mA. Finally, the trends, problems, and researches on transformerless grid-connected PV systems are discussed.

scholarly journals A Method for the Simultaneous Suppression of DC Capacitor Fluctuations and Common-Mode Voltage in a Five-Level NPC/H Bridge Inverter

Energies ◽  
2019 ◽  
Vol 12 (5) ◽  
pp. 779 ◽  
Author(s):  
Ming Wu ◽  
Zhenhao Song ◽  
Zhipeng Lv ◽  
Kai Zhou ◽  
Qi Cui
Keyword(s):  
Pulse Width Modulation ◽  
Neutral Point ◽  
Common Mode ◽  
Mapping Algorithm ◽  
Common Mode Voltage ◽  
Point Potential ◽  
Voltage Vector ◽  
Three Phase ◽  
Simulation And Experiment ◽  
The Common

To suppress the direct current (DC) capacitor voltage fluctuations and the common-mode voltage (CMV) in a three-phase, five-level, neutral-point-clamped (NPC)/H-bridge inverter, this paper analyzes the influence of all voltage vectors on the neutral point potential of each phase under different pulse mappings in detail with an explanation of the CMV distribution. Then, based on the traditional space vector pulse width modulation (SVPWM) algorithm, a dual-pulse-mapping algorithm is proposed to suppress the DC capacitor fluctuations and the CMV simultaneously. In the algorithm, the reference voltage synthesis selects the voltage vector that has the smallest CMV value as the priority. In addition, the two kinds of pulse mappings that have opposite effects on the neutral point potential are switched to output. At the same time, regulating factors are introduced to adjust the working time of each voltage vector under the two pulse mappings; then, the capacitor voltages can be balanced. Both the simulation and experiment demonstrate the algorithm’s effectiveness.

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