scholarly journals Study on Characteristics of Electrodeposited Thin Copper Film by Inorganic Additives in Pyrophosphate Copper Plating Bath

2014 ◽  
Vol 47 (1) ◽  
pp. 1-6 ◽  
Author(s):  
Seokbon Koo ◽  
Jinyoung Hur ◽  
Hongkee Lee
2011 ◽  
Vol 239-242 ◽  
pp. 3186-3189
Author(s):  
Xue Jiao Tang ◽  
Ai Hong Guo ◽  
Jin Gang Wang ◽  
Min Gao ◽  
Bo Xiong Shen

The acid dipping-plating pretreatment was applied on iron substrate prior to no-cyanide copper plating process. After being pretreated in dipping solution, the thin copper film formed on iron substrate which could change the cathode electronic potential and enhance the copper plating rate in the follow-up copper electroplating. As a comparation, the iron substrate was directly electroplated in another copper plating bath without dipping-plating pretreatment (DPr). The effects of temperature and electric current density on the copper plating rate were investigated in both process with DPr and process without DPr. And the mechanism was discussed.


2000 ◽  
Author(s):  
Christopher J. LaBounty ◽  
Gerry Robinson ◽  
Patrick Abraham ◽  
Ali Shakouri ◽  
John E. Bowers

Abstract Most optoelectronic devices are based on III-V semiconductors such as the InP/InGaAsP material system. Solid state refrigerators based on the same material system can be monolithically integrated with optoelectronics. Thermionic emission cooling in InGaAsP-based heterostructures has been shown experimentally to provide cooling power densities of several 100 W/cm2. Cooling by several degrees across thin films on the order of a micron thick has been demonstrated. Thermionic emission of hot electrons over heterobarriers allows for enhanced cooling power beyond what is possible from the bulk thermoelectric properties. The thermal resistance of the InP substrate between the hot side of the thin film cooler and the heat sink is found to be a limitation in cooler performance. Several possibilities are examined for replacing the InP substrate with a higher thermally conducting one such as silicon, copper, or even diamond, and a process for substrate transfer to a thin copper film has been developed. Three-dimensional simulations predict an order of magnitude improvement in the thermal resistance of the substrate. Experimental results of packaged InGaAsP coolers with copper substrates will be discussed.


1985 ◽  
Vol 36 (7) ◽  
pp. 289-290
Author(s):  
Shozo MIZUMOTO ◽  
Hidemi NAWAFUNE ◽  
Motoo KAWASAKI ◽  
Akemi KINOSHITA ◽  
Ken ARAKI

Author(s):  
Su Wang ◽  
S. W. Ricky Lee

There is an increasing demand for electronic devices with smaller sizes, higher performance and increased functionality. The development of vertical interconnects or through silicon vias (TSV) may be one of the most promising approaches to provide the three-dimensional (3D) integration of integrated circuits (IC). It is possible to improve the system’s performance with shorter RC delay, shorter signal paths and less power consumption. Electroplating process is one of the major contributors to the cost of TSV. Thus, plating time is one of our major concerns in TSV applications. About 80% of the TSVs are filled with copper due to its high conductivity and wide applications in multilayer wiring. Even though the electroplating of copper for interconnections is well established for the copper damascene micro-fabrication process, it has been shown that the filling of TSVs with copper plating is a different situation due to the much larger dimensions of TSVs. Generally the filling mechanism consists of conformal plating and bottom up plating. A 100% bottom up filling is preferred for copper filling in TSV. A seam may exist in via if the majority of filling mechanism is conformal plating. Thus, the bottom up filling profile is one the critical points to achieve void free filling. In this study, the void free copper filling TSVs with diameter from 10–30 m and depth from 50–150 m will be investigated by copper electroplating. A near 100% bottom up plating formula was developed in order to achieve void free and seam free filling. Filling performance of this plating formula was evaluated by examining vertical cross-sections and top-down cross-section of the filled TSVs using optical microscope and X-ray method. Pretreatment process and relationship with diffusion time will be also studied with respect to the TSV plating process. The effect of concentration of copper, acid and additives will be optimized to achieve the desired bottom up plating process. The ultimate goal is to achieve TSV plating with shorter plating time and better consistency. Electroplating experiment was conducted with an industrial electroplating tool. Successful plating results are demonstrated with optimized plating bath and plating mechanism. The void free and seam free copper deposition results are shown with minimized overburden. The time taken for the plating process is also greatly reduced with this near 100% bottom up plating formula. The benefits of this novel plating mechanism will be discussed in detail in this paper.


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