Design and Development of 4-Bit Gray Code Counter Circuit Using Reversible Logic Gate

Aim: This paper proposed the design and development of 4-Bit Gray Code Counter Circuit Using Reversible Logic Gate. Method : The 4-Bit Gray Code Counter Circuit can be design using SAM gate, Feynman gate (FG), double Feynman gate (DFG) and NOT gate. The proposed circuit is the combined application of 4-bit binary asynchronous counter and 4-bit binary to gray code converter circuit. Results:: The proposed gray code counter is designed using four no. of SAM gate, three no. of DFG, one FG and seven reversible NOT gate. The QC, GO and CI of proposed circuit are correspondingly 30, 4 and 7.

Design and Analysis of a Low Power Binary Counter-based Approximate Multiplier Architecture

Multiplication has become the fundamental arithmetic operation in modern electronic world. Many researches in Signal processing and image processing applications are looking for energy efficient architectures. These applications exhibit error tolerance thus laying foundation for approximation techniques. The proposed work utilizes a new binary counter for partial product accumulation in a segmentation based approximate multiplication technique. The fundamental building block of the counter is a 3-bit stack circuit, which combines each of “Logic 1” bits collectively, after which a stacking process is done to convert two 3-bit modules into a 6-bit stack module. The counter circuit is obtained by converting the bit stacks to binary counts, without any XOR gates on the critical line of operation. This leads to design of binary counters with effective yield of power and delay. Moreover, applying these counters for partial product accumulation in the approximate multipliers found to be more effective when compared with conventional techniques. In future, these counter based approximate multipliers can be utilized to design energy efficient filters for image processing and signal processing applications.

A RANDOM COUNTER IN USING SHIFT REGISTER AND ENCODER

Mostly some specific computer circuits and digital circuit applications need a random counter circuit module for handling specific tasks or operations. To design this kind of circuit, it is more common to use the standard format design of synchronous counter, although this will be more complicated to derive its truth table and karnaugh-maps in order to solve the right output equations for flip-flop inputs. This paper will introduce another way of designing a digital random counter, using shift register and encoder, which is easier to applied and the sequence of this counter can be managed randomly. The methodology being used for this research is mainly tounderstand the basic concept and combine the functions of shift register and encoder, to derive a new and simple form of designing a random counter. Using an Electronics Workbench software, the outputs are shown in logic simulation.

On the Efficient Representation of an Unbounded Resource with the Aid of One-Counter Circuits

A class of infinite-state automata with a simple periodic behaviour and a convenient graphical representation is studied. A positive one-counter circuit is defined as a strongly connected one-counter net (one-counter nondeterministic finite automata without zero-testing) with at least one positive cycle. It is shown that in a positive circuit an infinite part of a reachability set is an arithmetic progression; numerical properties of this progression are estimated. A specific graphical representation of circuits is presented. General one-counter nets are equivalent to Petri Nets with at most one unbounded place and to pushdown automata with a single-symbol stack alphabet. It is shown that an arbitrary one-counter net can be represented by a finite tree of circuits. A one-counter net is called sound, if a counter is used only for “infinite-state” (periodic) behaviour. It is shown that for an arbitrary one-counter net an equivalent sound net can be effectively constructed from the corresponding tree of circuits.

Design of a Digital Breathing Rate Tester Circuit

Digital breathing rate tester uses amplifier circuit, filter circuit, shaping circuit, and frequency quadruplicator circuit to process respiration signals. The signals processed are mixed with signals from logic controller circuit, pass the NAND gate, combine with signals from NAND gate and enter the pulse counter circuit. Pulse counter circuit’s digital tube shows the breathing rates.