Design and Analysis of Multiplexer Based 4-Bit Flash ADC

In reality, signals exist in analog format. The digital circuits are more convenient than analog circuits with respect to processing speed and efficiency in transmission. Hence there is a great demand for ADC converters. The typical Flash ADC contains resistor ladder circuit, comparator and code converter. The most advantageous parameter of Flash ADC is its speed. Hence it can be used in variety of applications such as micro electronics, wireless sensor networks, transceivers. Flash ADC still suffers from minimum resolution and consumes large amount of power. However these are due to its complexity in terms of chip area requirement in comparison with other ADCs. This new technique of four bit Flash ADC using TIQ comparator is implemented here. Here, a comparison is brought between the input signals with internal built threshold using TIQ comparators. It avoids the too much resistor usage in ladder network. In general, 2N -1 number of TIQ comparators is required to design N-bit flash ADC. TIQ output was encoded into binary by an encoder. A new MUX based encoding technique has been used to enhance the conversion speed for achieving highest sampling rate with low power dissipation. The design is simulated in Mentor Graphics environment using 130nm technology and result shows a deep reduce in the power consumption i.e.0.833µW and conversion speed 15.393ns for 4-bit ADC.

TIQ Flash ADC Design using a Low Power Multiplier Based Encoder

Threshold Inverter Quantization (TIQ) for applications of system-on-chip (SoC) depending on CMOS flash analog-to-digital converter (ADC). The TIQ technique which uses two cascaded CMOS inverters as a voltage comparator. However, this TIQ method must be created to meet the latest SoC trends, which force ADCs to be integrated with another electronic circuit on the chip and focus on low-power and low-voltage applications. TIQ comparator reduced the impact of variations in the process, temperature, and power supply voltage. Therefore, we obtained a higher TIQ flash ADC speed and resolution. TIQ flash ADC reduced / managed power dissipation. We obtain large power savings by managing the power dissipation in the comparator. Furthermore, the new comparator has a huge benefit in power dissipation and noise rejection comparative to the TIQ comparator [1]. The findings indicate that the TIQ flash ADC based on Modied mux attain heavy-speed transformation and has a tiny size, low-power dissipation and operation of lowvoltage compared to another flash ADCs.

Reduced Complexity Linearity Improved Threshold Quantized Comparator Based Flash ADC

This paper describes a standard cell-based new approach of comparator design for flash ADC. Conventional flash ADC comparator consumes up to 60% of the power due to resistive ladder network and analog comparators. Threshold inverter quantized (TIQ) comparators reported earlier have improved speed and provide low-power, low-voltage operation. But they need feature size variation and have non-linearity issues. Here, a new standard cell comparator is proposed which retains all advantages of TIQ comparator and provides improved linearity with reduced hardware complexity. A 4-bit ADC designed using the proposed comparator requires 206 minimum-sized transistors and provides large area saving compared to previously proposed designs. Thermometer code is partitioned using algebraic division theorem. This conversion is used for mathematical modeling and complexity reduction of decoder circuit using semi-parallel organization of comparators. Circuit is designed using 90 nm technology which exhibits satisfactory performance even in process variation.