Normally-off GaN HEMTs with InGaN p-gate cap layer formed by polarization doping

Narrow gate margin has been the critical limiting factor for the p-gate normally-off GaN HEMTs, imposing significant challenges in both gate-drive design and gate reliability. In this work, by developing dopant-free p-type polarization doping technique in composition-graded InGaN layer, high-quality Schottky contact between the gate metal and cap layer was demonstrated, achieving excellent gate current blocking performance (10-6 mA/mm) after the turning-on of the gate heterojunction structure. Resultantly, normally-off GaN HEMTs with enhanced gate breakdown voltage up to 15.2 V was realized, being especially beneficial for the simplification of gate drive design and the safe operation of gate terminal.

Activation of two dopants, Bi and Er in δ-doped layer in Si crystal

Conventional doping processes are no longer viable for realizing extreme structures, such as a δ-doped layer with multiple elements, such as the heavy Bi, within the silicon crystal. Here, we demonstrate the formation of (Bi + Er)-δ-doped layer based on surface nanostructures, i.e. Bi nanolines, as the dopant source by molecular beam epitaxy. The concentration of both Er and Bi dopants is controlled by adjusting the amount of deposited Er atoms, the growth temperature during Si capping and surfactant techniques. Subsequent post-annealing processing is essential in this doping technique to obtain activated dopants in the δ-doped layer. Electric transport measurement and photoluminescence study revealed that both Bi and Er dopants were activated after post-annealing at moderate temperature.

Experimental demonstration of high-gain CMOS inverter operation at low Vdd down to 0.5 V consisting of WSe2 n/p FETs

In this paper, we report on the device concepts for high-gain operation of a tungsten diselenide (WSe2) complementary metal-oxide-semiconductor (CMOS) inverter at a low power supply voltage (Vdd), which was realized by developing a doping technique and gate stack technology. A spin-coating with a fluoropolymer and poly(vinyl alcohol) (PVA) results in the doping of both electrons and holes to WSe2. A hybrid self-assembled monolayer (SAM)/aluminum oxide (AlOx) gate dielectric is viable for achieving high gate capacitance and superior interfacial properties. By developing the doping technique and gate stack technology, we experimentally realized a high gain of 9 at Vdd of 0.5 V in the WSe2 CMOS inverter. This study paves the way for the research and development of transition metal dichalcogenides (TMDC)-based devices and circuits.