Synthesis and Fabrication of High-Performance n-Type Silicon Nanowire Transistors

2004 ◽  
Vol 16 (21) ◽  
pp. 1890-1893 ◽  
Author(s):  
G. Zheng ◽  
W. Lu ◽  
S. Jin ◽  
C. M. Lieber
Author(s):  
Seungwon Yang ◽  
Younghwan Son ◽  
Sung Dae Suk ◽  
Dong-Won Kim ◽  
Donggun Park ◽  
...  

2012 ◽  
Author(s):  
M. Saitoh ◽  
C. Tanaka ◽  
K. Ota ◽  
K. Uchida ◽  
T. Numata

Author(s):  
Seungwon Yang ◽  
Kyoung Hwan Yeo ◽  
Dong-Won Kim ◽  
Kang-ill Seo ◽  
Donggun Park ◽  
...  

2021 ◽  
Author(s):  
Yejin Yang ◽  
Juhee Jeon ◽  
Jaemin Son ◽  
Kyoungah Cho ◽  
Sangsig Kim

Abstract The processing of large amounts of data requires a high energy efficiency and fast processing time for high-performance computing systems. However, conventional von Neumann computing systems have performance limitations because of bottlenecks in data movement between separated processing and memory hierarchy, which causes latency and high power consumption. To overcome this hindrance, logic-in-memory (LIM) has been proposed that performs both data processing and memory operations. Here, we present a NAND and NOR LIM composed of silicon nanowidre feedback field-effect transistors, whose configuration resembles that of CMOS logic gate circuits. The LIM can perform memory operations to retain its output logic under zero-bias conditions as well as logic operations with a high processing speed of nanoseconds. The newly proposed dynamic voltage-transfer characteristics verify the operating principle of the LIM. This study demonstrates that the NAND and NOR LIM has promising potential to resolve power and processing speed issues.


2021 ◽  
Vol 21 (8) ◽  
pp. 4330-4335
Author(s):  
Jaemin Son ◽  
Doohyeok Lim ◽  
Sangsig Kim

In this study, we examine the electrical characteristics of p+–n+–i–n+ silicon-nanowire field-effect transistors with partially gated channels. The silicon-nanowire field-effect transistors operate with barrier height modulation through positive feedback loops of charge carriers triggered by impact ionization. Our field-effect transistors exhibit outstanding switching characteristics, with an on current of ˜10−4 A, an on/off current ratio of ˜106, and a point subthreshold swing of ˜23 mV/dec. Moreover, the devices inhibit ambipolar characteristics because of the use of the partially gated structure and feature the p-channel operation mode.


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