scholarly journals A Single-Chip High-Voltage Integrated Actuator for Biomedical Ultrasound Scanners

Sensors ◽  
2019 ◽  
Vol 19 (23) ◽  
pp. 5063 ◽  
Author(s):  
Hsia ◽  
Hsiao ◽  
Huang
Keyword(s):  
Power Consumption ◽  
High Voltage ◽  
High Speed ◽  
Low Voltage ◽  
Second Harmonic ◽  
Pulse Signal ◽  
Silicon On Insulator ◽  
Imaging Systems ◽  
Output Stage ◽  
Static Power

This article presents a high-voltage (HV) pulse driver based on silicon-on-insulator (SOI) technology for biomedical ultrasound actuators and multi-channel portable imaging systems specifically. The pulse driver, which receives an external low-voltage drive signal and produces high-voltage pulses with a balanced rising and falling edge, is designed by synthesizing high-speed, capacitor-coupled level-shifters with a high-voltage H-bridge output stage. In addition, an on-chip floating power supply has also been developed to simplify powering the entire system and reduce static power consumption. The electrical and acoustic performance of the integrated eight-channel pulse driver has been verified by using medical-grade ultrasound probes to acquire the transmit/echo signals. The driver can produce pulse signals >100 Vpp with rise and fall times within 18.6 and 18.5 ns, respectively. The static power required to support the overall system is less than 3.6 mW, and the power consumption of the system during excitation is less than 50 mW per channel. The second harmonic distortion of the output pulse signal is as low as −40 dBc, indicating that the integrated multi-channel pulse driver can be used in advanced portable ultrasonic imaging systems.

The Feasible Analysis of Transformer Fast Reenergizing with Neutral Point Ungrounded

2013 ◽  
Vol 732-733 ◽  
pp. 958-964
Author(s):  
Yao Zhao ◽  
Yu De Yang ◽  
Yan Hong Pan ◽  
Le Qi
Keyword(s):  
High Voltage ◽  
Power Supply ◽  
Low Voltage ◽  
Second Harmonic ◽  
Neutral Point ◽  
Inrush Current ◽  
Differential Protection ◽  
Time Saving ◽  
Magnetizing Inrush Current ◽  
Transformer Differential Protection

The feasibility of transformer fast reenergizing with neutral point ungrounded after the external fault being removed is analyzed in this paper. By calculating overvoltage and discriminating magnetizing inrush current, it analyzes four ways to restore power of transformer and chooses the optimal strategy which is safe and time-saving. The result shows that in the case of transformer neutral point ungrounded, closing the low-voltage circuit side breaker before the high-voltage, which can effectively limit over-voltage in a safe range. The second harmonic characteristic of magnetizing waveform may disappear, while the intermittent angle characteristics are still significant. With the help of the intermittent angle principle, transformer differential protection may not misuse. The average time for each customer interruption is reduced from 40 minutes to 10 minutes and saves an hour for engineer on the way back and forth. It will greatly improve power supply reliability.

Low Power Electronics for Square-Wave Piezoactuator Driving

2009 ◽  
Author(s):  
G. Biancuzzi ◽  
T. Lemke ◽  
F. Goldschmidtboeing ◽  
O. Ruthmann ◽  
H.-J. Schrag ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Power Efficiency ◽  
Low Voltage ◽  
Power Converter ◽  
Driving Voltage ◽  
Output Stage ◽  
Maximum Displacement ◽  
Artificial Sphincter ◽  
Charge Recovery

The German Artificial Sphincter System (GASS) project aims at the development of an implantable sphincter prosthesis driven by a micropump. During the last few years the feasibility of the concept has been proven. At present our team’s effort is focused on the compliance to safety regulations and on a very low power consumption of the system as a whole. Therefore a low-voltage multilayer piezoactuator has been developed to reduce the driving voltage of the micropump from approximately 300 Vpp to 40 Vpp. Doing so, the driving voltage is within the limits set by the regulations for active implants. The operation of the micropump at lower voltages, achieved using multilayer piezoactuators, has already resulted in a much better power efficiency. Nevertheless, in order to further reduce power consumption, we have also developed an innovative driving technique that we are going to describe and compare to other driving systems. A direct switching circuit has been developed where the buffer capacitor of the step-up converter has been replaced by the equivalent capacitance of the actuator itself. This avoids the switching of the buffer capacitor to the actuator, which would result in a very low efficiency. Usually, a piezoactuator needs a bipolar voltage drive to achieve maximum displacement. In our concept, the voltage inversion across the actuator is done using an h-bridge circuit, allowing the employment of one step-up converter only. The charge stored in the actuator is then partially recovered by means of a step-down converter which stores back the energy at the battery voltage level. The power consumption measurements of our concept are compared to a conventional driving output stage and also with inductive charge recovery circuits. In particular, the main advantage, compared to the latter systems, consists in the small inductors needed for the power converter. Other charge recovery techniques require very big inductors in order to have a significant power reduction with the capacitive loads we use in our application. With our design we will be able to achieve approximately 55% reduction in power consumption compared to the simplest conventional driver and 15% reduction compared to a charge recovery driver.

Measuring Residual Stress on the Nanometer Scale - Novel Tools for Fundamental and Applied Research

2012 ◽  
Vol 1424 ◽  
Author(s):  
R. B. Wehrspohn ◽  
M. Krause ◽  
C. Schriever
Keyword(s):  
Low Voltage ◽  
Electron Backscatter Diffraction ◽  
Second Harmonic ◽  
Ion Beam ◽  
High Surface ◽  
Silicon On Insulator ◽  
Target Preparation ◽  
Surface Sensitivity ◽  
Buried Interfaces ◽  
Backscatter Diffraction

ABSTRACTIn the present paper, strain measurements based on second harmonic generation (SHG) and electron backscatter diffraction (EBSD) is demonstrated via two illustrative applications. While SHG gains access to strains in buried interfaces, EBSD can be used to measure strains in crystalline thin films with high spatial resolution on the order of tens of nanometers and high surface sensitivity. In addition, target preparation using low-voltage ion beam milling is demonstrated, gaining access to unstrained sample positions in strained silicon on insulator (sSOI) systems which are necessary for common “pattern-shift” methodologies.

A Preliminary Study on CSAMT Anti-Jamming Transmitter System

2014 ◽  
Vol 962-965 ◽  
pp. 317-321
Author(s):  
Dang Li ◽  
Jun Lu Wang ◽  
Yong Li ◽  
Jian Hua Li ◽  
Pin Rong Lin
Keyword(s):  
Data Acquisition ◽  
High Voltage ◽  
High Speed ◽  
Low Voltage ◽  
Host Computer ◽  
Good Prospect ◽  
Interference Signal ◽  
Computer Data ◽  
Random Code ◽  
Data Acquisition Card

On the basis of the relevant identification theory of pseudo-random code signal, the signals of CSAMT are divided into three parts according to the frequency of the signal. The signals which are susceptible to 50Hz interference signal and its harmonic components should be set by pseudo-random code way. Others are set by single square waveform way. The Control and signal generation software of the transmitter system is built on the advanced virtual instrument platform, LabVIEW. The hardware of the transmitter system is mainly composed of host computer, data acquisition card, high-speed optocoupler, IGBT driver module and four IGBT switches. The data acquisition card generate PWM signals, the high-speed optocoupler isolates low-voltage part and high-voltage part. IGBT drive module and four IGBT switches constitute high-voltage part. Entire transmitter system is suitable for different environments and research tasks, the transmit frequency are adjustable, and the pseudo-random code signal has strong capability to suppress the interference signals. The control software on host computer is simple and clear. There is good prospect for the use.

scholarly journals Low-Power High-Speed Double Gate 1-bit Full Adder Cell

2016 ◽  
Vol 62 (4) ◽  
pp. 329-334 ◽  
Author(s):  
Raushan Kumar ◽  
Sahadev Roy ◽  
C.T. Bhunia
Keyword(s):  
Power Consumption ◽  
High Speed ◽  
Low Voltage ◽  
Supply Voltage ◽  
Average Power ◽  
Full Adder ◽  
Cmos Technology ◽  
Spice Simulation ◽  
Pass Transistor ◽  
Voltage Swing

Abstract In this paper, we proposed an efficient full adder circuit using 16 transistors. The proposed high-speed adder circuit is able to operate at very low voltage and maintain the proper output voltage swing and also balance the power consumption and speed. Proposed design is based on CMOS mixed threshold voltage logic (MTVL) and implemented in 180nm CMOS technology. In the proposed technique the most time-consuming and power consuming XOR gates and multiplexer are designed using MTVL scheme. The maximum average power consumed by the proposed circuit is 6.94μW at 1.8V supply voltage and frequency of 500 MHz, which is less than other conventional methods. Power, delay, and area are optimized by using pass transistor logic and verified using the SPICE simulation tool at desired broad frequency range. It is also observed that the proposed design may be successfully utilized in many cases, especially whenever the lowest power consumption and delay are aimed.

Towards High-Voltage MOSFETs in Ultrathin FDSOI

2016 ◽  
Vol 25 (01n02) ◽  
pp. 1640005 ◽  
Author(s):  
Antoine Litty ◽  
Sylvie Ortolland ◽  
Dominique Golanski ◽  
Christian Dutto ◽  
Alexandres Dartigues ◽  
...  
Keyword(s):  
High Voltage ◽  
Low Voltage ◽  
Ground Plane ◽  
Silicon Film ◽  
Silicon On Insulator ◽  
Drift Region ◽  
Back Gate ◽  
Fully Depleted ◽  
Buried Oxide ◽  
Core Technology

High-Voltage MOSFETs are essential devices for complementing and extending the domains of application of any core technology including low-power, low-voltage CMOS. In this paper, we propose and describe advanced Extended-Drain MOSFETs, designed, processed and characterized in ultrathin body and buried oxide Fully Depleted Silicon on Insulator technology (UTBB-FDSOI). These transistors have been implemented in two technology nodes (28 nm and 14 nm) with different silicon film and buried oxide thicknesses (TSi < 10nm and TBOX ≤ 25nm). Our innovative concept of Dual Ground Plane (DGP) provides RESURF-like effect (reduced surface field) and offers additional flexibility for HVMOS integration directly in the ultrathin film of the FDSOI wafer. In this configuration, the primary back-gate controls the threshold voltage (VTH) to ensure performance and low leakage current. The second back-gate, located underneath the drift region, acts as a field plate enabling the improvement of the ON resistance (RON) and breakdown voltage (BV). The trade-off RON.S versus BV is investigated as a function of doping level, length and thickness of the drift region. We report promising results and discuss further developments for successful integration of high-voltage MOSFETs in ultrathin CMOS FDSOI technology.

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