Effect of the Grain Boundaries in Small Grain Polysilicon Thin Film Transistors

Author(s):  
A. Sakri ◽  
A. Le Glaunec ◽  
Y. Colin ◽  
O. Bonnaud
2009 ◽  
Vol 21 (20) ◽  
pp. 4949-4954 ◽  
Author(s):  
R. T. Weitz ◽  
K. Amsharov ◽  
U. Zschieschang ◽  
M. Burghard ◽  
M. Jansen ◽  
...  

2001 ◽  
Vol 665 ◽  
Author(s):  
J. H. Schön ◽  
L. D. Buchholz ◽  
Ch. Kloc ◽  
B. Batlogg

ABSTRACTThe charge transport properties in polycrystalline pentacene thin film transistors is investigated. A potential barrier is formed at grain boundaries due charged trapping states. The influence of such grain boundaries on the hole mobility of the devices is analyzed for different grain sizes, trap concentrations, and carrier densities. The results reveal that room temperature mobilities exceeding 0.5 cm2/Vs can be obtained in thin films with large grains as well as in nanocrystalline material. Consequently, single crystal device limits can be reached also by polycrystalline pentacene thin film transistors.


2005 ◽  
Vol 44 (5A) ◽  
pp. 2895-2901 ◽  
Author(s):  
Yukiharu Uraoka ◽  
Koji Kitajima ◽  
Hiroshi Kirimura ◽  
Hiroshi Yano ◽  
Tomoaki Hatayama ◽  
...  

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