An Analytic Potential Based Velocity Saturated Drain Current, Charge and Capacitance Model for Short Channel Symmetric Double Gate MOSFETs

2020 ◽  
pp. 723-735
Author(s):  
Vyas Murnal ◽  
C. Vijaya
Keyword(s):  
Drain Current ◽  
Double Gate ◽  
Short Channel ◽  
Capacitance Model ◽  
Analytic Potential

scholarly journals Effect of radius on various parameters of cylindrical surrounding double-gate (CSDG) MOSFET

2018 ◽  
Vol 7 (4) ◽  
pp. 2127
Author(s):  
Okikioluwa E. Oyedeji ◽  
Viranjay M. Srivastava
Keyword(s):  
Carrier Mobility ◽  
Research Work ◽  
Drain Current ◽  
Double Gate ◽  
Drift Diffusion ◽  
Short Channel ◽  
Channel Effect ◽  
Novel Structure ◽  
Capacitance Model ◽  
Improved Performance

The MOSFET is an integral component of electronics device and scaling the device is continuously in progress. This research work intro-duces a novel structure of the Cylindrical Surrounding Double-Gate (CSDG) MOSFET to improve scaling and to suppress Short Channel Effect (SCE). In order to achieve this improvement, the drift-diffusion components are used to analyze the drain current of the device through the Pao-Sah integral. Then transconductance is derived to indicate an improved performance of the proposed design. The capaci-tance characteristics of this MOSFET is also analyzed through the equivalent capacitance model as well as the analysis of the carrier mobility, in which it has been observed that scaling of the device supports increase in mobility of the charge carrier.  

scholarly journals Design Consideration and Impact of Gate Length Variation on Junctionless Strained Double Gate MOSFET

2019 ◽  
Vol 8 (2S6) ◽  
pp. 783-791
Keyword(s):  
Field Effect Transistors ◽  
Scaling Limit ◽  
Drain Current ◽  
Oxide Semiconductor ◽  
Length Variation ◽  
Gate Length ◽  
Double Gate ◽  
Simulation Design ◽  
Short Channel ◽  
Fully Depleted

Aggressive scaling of Metal-oxide-semiconductor Field Effect Transistors (MOSFET) have been conducted over the past several decades and now is becoming more intricate due to its scaling limit and short channel effects (SCE). To overcome this adversity, a lot of new transistor structures have been proposed, including multi gate structure, high-k/metal gate stack, strained channel, fully-depleted body and junctionless configuration. This paper describes a comprehensive 2-D simulation design of a proposed transistor that employs all the aforementioned structures, named as Junctionless Strained Double Gate MOSFETs (JLSDGM). Variation in critical design parameter such as gate length (Lg ) is considered and its impact on the output properties is comprehensively investigated. The results shows that the variation in gate length (Lg ) does contributes a significant impact on the drain current (ID), on-current (ION), off-current (IOFF), ION/IOFF ratio, subthreshold swing (SS) and transconductance (gm). The JLSDGM device with the least investigated gate length (4nm) still provides remarkable device properties in which both ION and gm(max) are measured at 1680 µA/µm and 2.79 mS/µm respectively

scholarly journals Revisiting Analytical Models of N-Type Symmetric Double-Gate MOSFETs Shaded Conditions

2020 ◽  
Vol 24 (1) ◽  
Author(s):  
Rekib Uddin Ahmed ◽  
Prabir Saha
Keyword(s):  
Integrated Circuits ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Cmos Technology ◽  
Channel Length ◽  
Oxide Semiconductor ◽  
Analytical Models ◽  
Double Gate ◽  
Short Channel ◽  
Channel Effects

Nowadays, the endlessly increasing demand for faster and complex integrated circuits (IC) has been fuelled by the scaling of metal-oxide-semiconductor field-effect-transistors (MOSFET) to smaller dimensions. The continued scaling of MOSFETs approaches its physical limits due to short-channel effects (SCE). Double-gate (DG) MOSFET is one of the promising alternatives as it offers better immunity towards SCEs and can be scaled to the shortest channel length. In future, ICs can be designed using DG-CMOS technology for which mathematical models depicting the electrical characteristics of the DG MOSFETs are foremost needed. In this paper, a review on n-type symmetric DG MOSFETs models has been presented based on the analyses of electrostatic potential distribution, threshold voltage, and drain-current models. Mathematical derivations of the device models are described elaborately, and numerical simulations are also carried out to validate the replicability of models.

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