An etch-rate study of thermally annealed LTCVD SiO2 films as a function of initial deposition conditions

1984 ◽  
Vol 3 (11) ◽  
pp. 979-982 ◽  
Author(s):  
C. Cobianu ◽  
C. Pavelescu
1990 ◽  
Vol 25 (2) ◽  
pp. 1366-1368 ◽  
Author(s):  
C. Orfescu ◽  
C. Pavelescu ◽  
M. Badila
Keyword(s):  

1989 ◽  
Vol 149 ◽  
Author(s):  
J. Kanicki ◽  
E. Hasan ◽  
D. F. Kotecki ◽  
T. Takamori ◽  
J. H. Griffith

ABSTRACTDevice quality undoped hydrogenated microcrystalline silicon has been prepared by plasma enhanced chemical vapor deposition under different conditions. The dependence of physical, chemical, structural, and electrical properties on the deposition conditions has been investigated. Conductive (conductivity above 10−3Ω−1 cm−1) and resistive (conductivity around 10−9Ω−1cm−1) layers having approximately the same grain size, at a given substrate temperature, have been deposited between 200 and 500°C at two different hydrogen dilutions. Independently of the hydrogen dilution, the average grain sized is dependent on the deposition temperature and the film thickness; and a maximum average grain size of about 40 nm has been achieved for a thick film deposited at 500°C. The density of paramagnetic defects also increases with increasing deposition temperature, which indicates that more dangling bond defects are introduced as the total area of the grain boundaries increases. The etch rate decreases with increasing deposition temperature, and for the films deposited at 250 and 500°C the etch rate has been measured to be 6.6 and 2.7 nm/min, respectively. Thin film transistors incorporating a microcrystalline channel have been fabricated and evaluated. The best device had the following properties: field effect mobility, threshold voltage, and on/off current ratio of about 0.8 cm2/V sec, below 5 V, and around 106, respectively.


2009 ◽  
Vol 145-146 ◽  
pp. 203-206 ◽  
Author(s):  
Sonja Sioncke ◽  
David P. Brunco ◽  
Marc Meuris ◽  
Olivier Uwamahoro ◽  
Jan Van Steenbergen ◽  
...  

The Si transistor has dominated the semiconductor industry for decades. However, to fulfill the demands of Moore’s law, the Si transistor has been pushed to its physical limits. Introducing new materials with higher intrinsic carrier mobility is one way to solve this problem. Ge, GaAs and InGaAs are known for their high mobilities and are therefore suitable candidates for replacing Si as a channel material. However, introduction of new materials raises new issues. For Si processing, several steps such as cleaning, etching and stripping are based on wet treatments. The knowledge of etch rates of the semiconductor material is of great importance. In this paper, etch rates of Ge, GaAs and InGaAs in several chemical solutions are studied. A comparison of the etch rates is made between the materials.


2012 ◽  
Vol 195 ◽  
pp. 21-24
Author(s):  
Jong Seok Lee ◽  
Geun Min Choi ◽  
Ji Nok Jung ◽  
Dong Duk Lee ◽  
Gin Yung Hur ◽  
...  

With scaling of ULSI devices, the process temperatures are continuously lowered. The oxide films, which were deposited at low temperature, show fast etching rates during wet etching compared to high temperature films. Also, the etch rates differ largely from other film deposition conditions. In order to overcome these etch rate differences during surface preparation, dry cleaning processes had been introduced where the etch selectivity of the soft oxide films to the thermal oxide are very similar, regardless of the film deposition conditions and the deposition temperature.


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