Band offset and electrical properties of ErZO/β-Ga2O3 and GZO/β-Ga2O3 heterojunctions

4H-SiC MOS capacitors were used to characterize the effect of reactive-ion etching of the SiC surface on the electrical properties of N2O-grown thermal oxides. The oxide breakdown field reduces from 9.5 MV/cm with wet etching to saturate at 9.0 MV/cm with 30% reactive-ion over-etching. Additionally, the conduction-band offset barrier height, φB, progressively decreases from 2.51 eV with wet etching to 2.46 eV with 45% reactive-ion over-etching.

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In situ TEM measurements of the electrical properties of interface dislocations

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100131322 ◽

1992 ◽

Vol 50 (2) ◽

pp. 1338-1339

Author(s):

F. M. Ross ◽

R. Hull ◽

D. Bahnck ◽

J. C. Bean ◽

L. J. Peticolas ◽

...

Keyword(s):

Electrical Properties ◽

Electronic Device ◽

In Situ Tem ◽

Device Performance ◽

Misfit Dislocations ◽

Electrical Characteristics ◽

Strained Layer ◽

Transmission Electron ◽

Interfacial Dislocations

We describe an investigation of the electrical properties of interfacial dislocations in strained layer heterostructures. We have been measuring both the structural and electrical characteristics of strained layer p-n junction diodes simultaneously in a transmission electron microscope, enabling us to correlate changes in the electrical characteristics of a device with the formation of dislocations.The presence of dislocations within an electronic device is known to degrade the device performance. This degradation is of increasing significance in the design and processing of novel strained layer devices which may require layer thicknesses above the critical thickness (hc), where it is energetically favourable for the layers to relax by the formation of misfit dislocations at the strained interfaces. In order to quantify how device performance is affected when relaxation occurs we have therefore been investigating the electrical properties of dislocations at the p-n junction in Si/GeSi diodes.

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The morphologies and electrical properties of indium contacts on (100) cadmium telluride surfaces

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100131747 ◽

1992 ◽

Vol 50 (2) ◽

pp. 1422-1423

Author(s):

A.M. Letsoalo ◽

M.E. Lee ◽

E.O. de Neijs

Keyword(s):

Electrical Properties ◽

Cadmium Telluride ◽

Methanol Solution ◽

Electrical Characteristics ◽

Metal Contacts ◽

Deposition Technique ◽

Interfacial Layers ◽

Semiconductor Contacts ◽

Grown Single Crystal ◽

Diamond Abrasive

Semiconductor devices require metal contacts for efficient collection of electrical charge. The physics of these metal/semiconductor contacts assumes perfect, abrupt and continuous interfaces between the layers. However, in practice these layers are neither continuous nor abrupt due to poor nucleation conditions and the formation of interfacial layers. The effects of layer thickness, deposition rate and substrate stoichiometry have been previously reported. In this work we will compare the effects of a single deposition technique and multiple depositions on the morphology of indium layers grown on (100) CdTe substrates. The electrical characteristics and specific resistivities of the indium contacts were measured, and their relationships with indium layer morphologies were established.Semi-insulating (100) CdTe samples were cut from Bridgman grown single crystal ingots. The surface of the as-cut slices were mechanically polished using 5μm, 3μm, 1μm and 0,25μm diamond abrasive respectively. This was followed by two minutes immersion in a 5% bromine-methanol solution.

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Structural properties of GaAs/InGaAs/GaAs (001) and InGaAs/GaAs (001) heterostructures and correlation with electronic properties

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100176149 ◽

1990 ◽

Vol 48 (4) ◽

pp. 602-603

Author(s):

J.M. Bonar ◽

R. Hull ◽

R. Malik ◽

R. Ryan ◽

J.F. Walker

Keyword(s):

Band Gap ◽

Electronic Properties ◽

Gaas Substrate ◽

Critical Thickness ◽

Lattice Mismatch ◽

Band Offset ◽

Misfit Dislocations ◽

Gaas Substrates ◽

Gaas Structure ◽

Low X

In this study we have examined a series of strained heteropeitaxial GaAs/InGaAs/GaAs and InGaAs/GaAs structures, both on (001) GaAs substrates. These heterostructures are potentially very interesting from a device standpoint because of improved band gap properties (InAs has a much smaller band gap than GaAs so there is a large band offset at the InGaAs/GaAs interface), and because of the much higher mobility of InAs. However, there is a 7.2% lattice mismatch between InAs and GaAs, so an InxGa1-xAs layer in a GaAs structure with even relatively low x will have a large amount of strain, and misfit dislocations are expected to form above some critical thickness. We attempt here to correlate the effect of misfit dislocations on the electronic properties of this material.The samples we examined consisted of 200Å InxGa1-xAs layered in a hetero-junction bipolar transistor (HBT) structure (InxGa1-xAs on top of a (001) GaAs buffer, followed by more GaAs, then a layer of AlGaAs and a GaAs cap), and a series consisting of a 200Å layer of InxGa1-xAs on a (001) GaAs substrate.

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Formation of high temperature phase in flash-evaporated SnSe films

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100176629 ◽

1990 ◽

Vol 48 (4) ◽

pp. 698-699

Author(s):

J.P.S. Hanjra

Keyword(s):

Thin Films ◽

Electrical Properties ◽

Energy Gap ◽

Dominant Role ◽

Fine Powder ◽

High Temperature Phase ◽

Temperature Phase ◽

Water Mixture ◽

Flash Evaporation ◽

Photovoltaic Applications

Tin mono selenide (SnSe) with an energy gap of about 1 eV is a potential material for photovoltaic applications. Various authors have studied the structure, electronic and photoelectronic properties of thin films of SnSe grown by various deposition techniques. However, for practical photovoltaic junctions the electrical properties of SnSe films need improvement. We have carried out investigations into the properties of flash evaporated SnSe films. In this paper we report our results on the structure, which plays a dominant role on the electrical properties of thin films by TEM, SEM, and electron diffraction (ED).Thin films of SnSe were deposited by flash evaporation of SnSe fine powder prepared from high purity Sn and Se, onto glass, mica and KCl substrates in a vacuum of 2Ø micro Torr. A 15% HF + 2Ø% HNO3 solution was used to detach SnSe film from the glass and mica substrates whereas the film deposited on KCl substrate was floated over an ethanol water mixture by dissolution of KCl. The floating films were picked up on the grids for their EM analysis.

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