scholarly journals System-level variation-aware aging simulator using a unified novel gate-delay model for bias temperature instability, hot carrier injection, and gate oxide breakdown

2015 ◽  
Vol 55 (9-10) ◽  
pp. 1334-1340 ◽  
Author(s):  
Taizhi Liu ◽  
Chang-Chih Chen ◽  
Soonyoung Cha ◽  
Linda Milor
Keyword(s):  
Gate Oxide ◽  
System Level ◽  
Gate Delay ◽  
Delay Model ◽  
Carrier Injection ◽  
Level Variation ◽  
Oxide Breakdown ◽  
Hot Carrier ◽  
Bias Temperature Instability ◽  
Hot Carrier Injection

Effect of substrate hot-carrier injection on quasibreakdown of ultrathin gate oxide

1999 ◽  
Vol 86 (11) ◽  
pp. 6590-6592 ◽  
Author(s):  
Byung Jin Cho ◽  
Zhen Xu ◽  
Hao Guan ◽  
M. F. Li
Keyword(s):  
Gate Oxide ◽  
Carrier Injection ◽  
Hot Carrier ◽  
Hot Carrier Injection

scholarly journals 3.3V Transmitter Using 1.8V Transistors In A Cascode Configuration

2021 ◽  
Author(s):  
Marcs Ng
Keyword(s):  
Integrated Circuits ◽  
Transmission Rate ◽  
Carrier Injection ◽  
Digital Integrated Circuits ◽  
Negative Bias Temperature Instability ◽  
Hot Carrier ◽  
Bias Temperature Instability ◽  
Hot Carrier Injection ◽  
Capacitive Load ◽  
Ac Transmission

A voltage-mode transmitter using a 1.8V-to-3.3V levelshifter and cascoded output buffer is proposed. 1.8V TSMC 65nm transistors are used. The design is targeted to meet JEDEC Interface Standard for Nominal 3 V/3.3 V Supply Digital Integrated Circuits DC Specifications as well as an AC transmission rate of 200 MHz on a 30 cm 50Ω board trace terminated with a 4 pF capacitive load. Overstress voltages will not be exceeded in order to avoid device failure due to breaching Gate Oxide Integrity, Hot Carrier Injection, or Negative Bias Temperature Instability.

scholarly journals The TDDB Characteristics of Ultra-Thin Gate Oxide MOS Capacitors under Constant Voltage Stress and Substrate Hot-Carrier Injection

2018 ◽  
Vol 2018 ◽  
pp. 1-6
Author(s):  
Jingyu Shen ◽  
Can Tan ◽  
Rui Jiang ◽  
Wei Li ◽  
Xue Fan ◽  
...  
Keyword(s):  
Degradation Mechanism ◽  
Gate Oxide ◽  
Cmos Technology ◽  
Carrier Injection ◽  
Constant Voltage ◽  
Mos Capacitors ◽  
Hot Carrier ◽  
Hot Carrier Injection ◽  
Voltage Stress ◽  
Thin Gate Oxide

The breakdown characteristics of ultra-thin gate oxide MOS capacitors fabricated in 65 nm CMOS technology under constant voltage stress and substrate hot-carrier injection are investigated. Compared to normal thick gate oxide, the degradation mechanism of time-dependent dielectric breakdown (TDDB) of ultra-thin gate oxide is found to be different. It is found that the gate current (Ig) of ultra-thin gate oxide MOS capacitor is more likely to be induced not only by Fowler-Nordheim (F-N) tunneling electrons, but also by electrons surmounting barrier and penetrating electrons in the condition of constant voltage stress. Moreover it is shown that the time to breakdown (tbd) under substrate hot-carrier injection is far less than that under constant voltage stress when the failure criterion is defined as a hard breakdown according to the experimental results. The TDDB mechanism of ultra-thin gate oxide will be detailed. The differences in TDDB characteristics of MOS capacitors induced by constant voltage stress and substrate hot-carrier injection will be also discussed.

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