Effectively enhanced comprehensive electrical performance of ZnO varistors by a fast combinatorial refinement method

Because of their unusual properties – non-ohmic behavior and the ability to absorb a lot of energy – metal-oxide varistors are widely used for the protection of electrical and electronic devices against over-voltages. ZnO ceramics have varistor properties because of their metal-oxide additives and the microstructures developed during sintering. The value of the varistor voltage depends largely on the number of conducting ZnO grains between the electrodes; this can be set by controlling the thickness of the device or the size of the grains. The desired grain size can be achieved by altering the composition of the metal-oxide additives and the sintering conditions. In this work the grain growth was controlled by combining two ZnO powders of differing sinterability in the starting material. Also, the use of BaBiO2.77 as a precursor for Bi2O3 is an innovation in varistor technology that makes it possible to reduce the amount of added metal oxides. As a result, a variety of varistors with good varistor properties and a wide range of working parameters were produced.

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Microchemistry of ZnO Varistors

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100133102 ◽

1992 ◽

Vol 50 (2) ◽

pp. 1694-1695

Author(s):

K. K. Soni ◽

J. Hwang ◽

V. P. Dravid ◽

T. O. Mason ◽

R. Levi-Setti

Keyword(s):

Grain Boundaries ◽

Multiple Roles ◽

Grain Boundary Engineering ◽

Ion Microprobe ◽

Dopant Distribution ◽

Important Ingredient ◽

Zno Varistor ◽

Zno Varistors ◽

Zno Powder ◽

The University

ZnO varistors are made by mixing semiconducting ZnO powder with powders of other metal oxides e.g. Bi2O3, Sb2O3, CoO, MnO2, NiO, Cr2O3, SiO2 etc., followed by conventional pressing and sintering. The non-linear I-V characteristics of ZnO varistors result from the unique properties that the grain boundaries acquire as a result of dopant distribution. Each dopant plays important and sometimes multiple roles in improving the properties. However, the chemical nature of interfaces in this material is formidable mainly because often trace amounts of dopants are involved. A knowledge of the interface microchemistry is an essential component in the ‘grain boundary engineering’ of materials. The most important ingredient in this varistor is Bi2O3 which envelopes the ZnO grains and imparts high resistance to the grain boundaries. The solubility of Bi in ZnO is very small but has not been experimentally determined as a function of temperature.In this study, the dopant distribution in a commercial ZnO varistor was characterized by a scanning ion microprobe (SIM) developed at The University of Chicago (UC) which offers adequate sensitivity and spatial resolution.

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Metal Microstructures in Advanced CMOS Devices

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100164258 ◽

1996 ◽

Vol 54 ◽

pp. 358-359

Author(s):

L. M. Gignac ◽

K. P. Rodbell

Keyword(s):

Grain Boundaries ◽

Semiconductor Device ◽

Chemical Vapor ◽

Microstructural Characterization ◽

Metal Films ◽

Thin Metal ◽

Electrical Performance ◽

Thin Metal Films ◽

Chemical Vapor Deposited ◽

Boundary Properties

As advanced semiconductor device features shrink, grain boundaries and interfaces become increasingly more important to the properties of thin metal films. With film thicknesses decreasing to the range of 10 nm and the corresponding features also decreasing to sub-micrometer sizes, interface and grain boundary properties become dominant. In this regime the details of the surfaces and grain boundaries dictate the interactions between film layers and the subsequent electrical properties. Therefore it is necessary to accurately characterize these materials on the proper length scale in order to first understand and then to improve the device effectiveness. In this talk we will examine the importance of microstructural characterization of thin metal films used in semiconductor devices and show how microstructure can influence the electrical performance. Specifically, we will review Co and Ti silicides for silicon contact and gate conductor applications, Ti/TiN liner films used for adhesion and diffusion barriers in chemical vapor deposited (CVD) tungsten vertical wiring (vias) and Ti/AlCu/Ti-TiN films used as planar interconnect metal lines.

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Effective performance improvement of organic thin film transistors with multi-layer modifications

The European Physical Journal Applied Physics ◽

10.1051/epjap/2020200138 ◽

2020 ◽

Vol 91 (3) ◽

pp. 30201

Author(s):

Hang Yu ◽

Jianlin Zhou ◽

Yuanyuan Hao ◽

Yao Ni

Keyword(s):

Thin Film ◽

Thin Film Transistors ◽

Performance Enhancement ◽

Organic Thin Film Transistors ◽

Electrical Performance ◽

Hole Injection ◽

Organic Thin Film ◽

Effective Performance ◽

Significant Performance ◽

P Type

Organic thin film transistors (OTFTs) based on dioctylbenzothienobenzothiophene (C8BTBT) and copper (Cu) electrodes were fabricated. For improving the electrical performance of the original devices, the different modifications were attempted to insert in three different positions including semiconductor/electrode interface, semiconductor bulk inside and semiconductor/insulator interface. In detail, 4,4′,4′′-tris[3-methylpheny(phenyl)amino] triphenylamine (m-MTDATA) was applied between C8BTBTand Cu electrodes as hole injection layer (HIL). Moreover, the fluorinated copper phthalo-cyanine (F16CuPc) was inserted in C8BTBT/SiO2 interface to form F16CuPc/C8BTBT heterojunction or C8BTBT bulk to form C8BTBT/F16CuPc/C8BTBT sandwich configuration. Our experiment shows that, the sandwich structured OTFTs have a significant performance enhancement when appropriate thickness modification is chosen, comparing with original C8BTBT devices. Then, even the low work function metal Cu was applied, a normal p-type operate-mode C8BTBT-OTFT with mobility as high as 2.56 cm2/Vs has been fabricated.

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Effects of Sb, Zr, or Y addition on Electrical Degradation Characteristics of ZnO Varistors

IEEJ Transactions on Fundamentals and Materials ◽

10.1541/ieejfms.131.219 ◽

2011 ◽

Vol 131 (3) ◽

pp. 219-224

Author(s):

Takayuki Watanabe ◽

Ai Fukumori ◽

Yuji Akiyama ◽

Masayuki Takada ◽

Yuuki Sato ◽

...

Keyword(s):

Electrical Degradation ◽

Zno Varistors

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Effects of Zr and Y Addition on the Electrical Degradation Characteristics of ZnO Varistors

IEEJ Transactions on Fundamentals and Materials ◽

10.1541/ieejfms.130.394 ◽

2010 ◽

Vol 130 (4) ◽

pp. 394-402 ◽

Cited By ~ 1

Author(s):

Yuji Akiyama ◽

Masayuki Takada ◽

Ai Fukumori ◽

Yuuki Sato ◽

Shinzo Yoshikado

Keyword(s):

Electrical Degradation ◽

Zno Varistors

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Degradation and SILC Effects of RPECVD sub-2.0nm Oxide/Nitride and Oxynitride Dielectrics Under Constant Current Stress

MRS Proceedings ◽

10.1557/proc-716-b2.9 ◽

2002 ◽

Vol 716 ◽

Cited By ~ 1

Author(s):

Yi-Mu Lee ◽

Yider Wu ◽

Joon Goo Hong ◽

Gerald Lucovsky

Keyword(s):

Leakage Current ◽

Electrical Performance ◽

Constant Current ◽

Continuous Increase ◽

Current Stress ◽

Thermal Oxide ◽

Stress Induced Leakage Current ◽

Boron Penetration ◽

Soft Breakdown ◽

Induced Defects

AbstractConstant current stress (CCS) has been used to investigate the Stress-Induced Leakage Current (SILC) to clarify the influence of boron penetration and nitrogen incorporation on the breakdown of p-channel devices with sub-2.0 nm Oxide/Nitride (O/N) and oxynitride dielectrics prepared by remote plasma enhanced CVD (RPECVD). Degradation of MOSFET characteristics correlated with soft breakdown (SBD) and hard breakdown (HBD), and attributed to the increased gate leakage current are studied. Gate voltages were gradually decreased during SBD, and a continuous increase in SILC at low gate voltages between each stress interval, is shown to be due to the generation of positive traps which are enhanced by boron penetration. Compared to thermal oxides, stacked O/N and oxynitride dielectrics with interface nitridation show reduced SILC due to the suppression of boron penetration and associated positive trap generation. Devices stressed under substrate injection show harder breakdown and more severe degradation, implying a greater amount of the stress-induced defects at SiO2/substrate interface. Stacked O/N and oxynitride devices also show less degradation in electrical performance compared to thermal oxide devices due to an improved Si/SiO2 interface, and reduced gate-to-drain overlap region.

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Correlation Between the Tunnelling Oxide and I-V Curves of MIS Photodiodes

MRS Proceedings ◽

10.1557/proc-762-a18.16 ◽

2003 ◽

Vol 762 ◽

Author(s):

H. Águas ◽

L. Pereira ◽

A. Goullet ◽

R. Silva ◽

E. Fortunato ◽

...

Keyword(s):

Hydrogen Peroxide ◽

Oxide Layer ◽

Spectroscopic Ellipsometry ◽

Chemical Deposition ◽

Oxide Thickness ◽

Electrical Performance ◽

Signal To Noise ◽

Rectification Factor ◽

Mis Devices ◽

The Ideal

AbstractIn this work we present results of a study performed on MIS diodes with the following structure: substrate (glass) / Cr (2000Å) / a-Si:H n+ (400Å) / a-Si:H i (5500Å) / oxide (0-40Å) / Au (100Å) to determine the influence of the oxide passivation layer grown by different techniques on the electrical performance of MIS devices. The results achieved show that the diodes with oxides grown using hydrogen peroxide present higher rectification factor (2×106)and signal to noise (S/N) ratio (1×107 at -1V) than the diodes with oxides obtained by the evaporation of SiO2, or by the chemical deposition of SiO2 by plasma of HMDSO (hexamethyldisiloxane), but in the case of deposited oxides, the breakdown voltage is higher, 30V instead of 3-10 V for grown oxides. The ideal oxide thickness, determined by spectroscopic ellipsometry, is dependent on the method used to grow the oxide layer and is in the range between 6 and 20 Å. The reason for this variation is related to the degree of compactation of the oxide produced, which is not relevant for applications of the diodes in the range of ± 1V, but is relevant when high breakdown voltages are required.

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