scholarly journals Drain Current and Noise Model of Cylindrical Surrounding Double-Gate MOSFET for RF Switch

2012 ◽  
Vol 38 ◽  
pp. 517-521 ◽  
Author(s):  
Viranjay M. srivastava ◽  
K.S. Yadav ◽  
G. Singh
Keyword(s):  
Drain Current ◽  
Noise Model ◽  
Double Gate ◽  
Rf Switch ◽  
Double Gate Mosfet

scholarly journals Realization with Fabrication of Double-Gate MOSFET Based Buck Regulator

2021 ◽  
pp. 66-75
Author(s):  
Simone Leeuw ◽  
◽  
Viranjay M. Srivastava
Keyword(s):  
Output Voltage ◽  
High Efficiency ◽  
Research Work ◽  
Drain Current ◽  
Input Voltage ◽  
Switching Frequency ◽  
Maximum Output ◽  
Double Gate ◽  
Dg Mosfet ◽  
Double Gate Mosfet

The traditional buck regulator provides the steady output voltage with high efficiency and low power dissipation. Various parameters of this regulator can be improved by the placement of Double-Gate (DG) MOSFET. The double-gate MOSFET provides twice the drain current flow, which improves the various parameters of buck regulator structure and inevitably increases the device performance and efficiency. In this research work, these parameters have been analyzed with implemented DG MOSFET buck regulator and realized the total losses 42.676 mW and efficiency 74.208%. This research work has designed a DG MOSFET based buck regulator with the specification of input voltage 12 V, output voltage 3.3 V, maximum output current 40 mA, switching frequency 100 kHz, ripple current of 10%, and ripple voltage of 1%.

Modeling and Simulation of Nanoscale Lateral Gaussian Doped Channel Asymmetric Double Gate MOSFET

2015 ◽  
Vol 36 ◽  
pp. 51-63 ◽  
Author(s):  
Vandana Kumari ◽  
Manoj Saxena ◽  
Mridula Gupta
Keyword(s):  
Analytical Modeling ◽  
Current Model ◽  
Drain Current ◽  
Doping Profile ◽  
Mode Analysis ◽  
Double Gate ◽  
Digital Performance ◽  
Dg Mosfet ◽  
Double Gate Mosfet ◽  
The Impact

This work presents the drain current model using Evanescent Mode Analysis (EMA) for nanoscale Double Gate MOSFET having Gaussian doping profile along the horizontal direction in the channel i.e. from source to drain region. Due to heavily doped channel, band gap narrowing effect is incorporated in the analytical modeling scheme. The various parameters evaluated in this work using analytical modeling scheme are surface potential, electric field, threshold voltage, sub-threshold slope and drain current. The impact of peak Gaussian doping profile on the drain current and trans-conductance has been demonstrated which are important for assessing the analog performance of the device. The results are also compared with the uniformly doped DG MOSFET. The asymmetric behaviour of Gaussian doped DG MOSFET has also been investigated. In addition to this, digital performance of Gaussian doped DG MOSFET has also been assessed using exhaustive device simulation.

Comparisons between Dual and Tri Material Gate on a 32 nm Double Gate MOSFET

NANO ◽  
2016 ◽  
Vol 11 (10) ◽  
pp. 1650117 ◽  
Author(s):  
Arpan Dasgupta ◽  
Rahul Das ◽  
Shramana Chakraborty ◽  
Arka Dutta ◽  
Atanu Kundu ◽  
...  
Keyword(s):  
Drain Current ◽  
Current Gain ◽  
Gate Length ◽  
Double Gate ◽  
Transport Delay ◽  
Double Gate Mosfet ◽  
Rf Performance ◽  
Dual Material ◽  
Analog Parameters ◽  
Intrinsic Gain

The paper reports a comparative analysis between the dual material gate double gate (DMG-DG) nMOSFET and the tri material gate double gate (TMG-DG) nMOSFET in terms of their analog and RF performance. Three different devices having the DMG-DG structure have been considered. Each of the devices have different higher workfunction material gate length (L1) to lower workfunction material gate length (L2) ratio (L1:L2). Along with the three devices, the performance of the TMG-DG nMOSFET is compared. The analog parameters considered for the comparison are the drain current ([Formula: see text]), the transconductance ([Formula: see text]), the transconductance generation factor ([Formula: see text]/[Formula: see text]) and the intrinsic gain ([Formula: see text]Ro). The drain induced barrier lowering (DIBL) of the devices is compared. The RF analysis is performed using the non quasi static (NQS) approach. We consider the intrinsic gate to source capacitances ([Formula: see text]), the intrinsic gate to drain capacitance ([Formula: see text]), the intrinsic gate to source resistances ([Formula: see text]), the intrinsic gate to drain resistance ([Formula: see text]), the transport delay ([Formula: see text]), the unity current gain cut-off frequency ([Formula: see text]) and the max frequency of oscillation ([Formula: see text]) for the RF comparisons. A single stage amplifier is also implemented using the devices for a circuit comparison.

An improvement to computational efficiency of the drain current model for double-gate MOSFET

2011 ◽  
Vol 20 (9) ◽  
pp. 097304
Author(s):  
Xing-Ye Zhou ◽  
Jian Zhang ◽  
Zhi-Ze Zhou ◽  
Li-Ning Zhang ◽  
Chen-Yue Ma ◽  
...  
Keyword(s):  
Computational Efficiency ◽  
Current Model ◽  
Drain Current ◽  
Double Gate ◽  
Double Gate Mosfet
Sign in / Sign up

Export Citation Format

Share Document