scholarly journals Realization with Fabrication of Double-Gate MOSFET Based Buck Regulator

Author(s):  
Simone Leeuw ◽  
◽  
Viranjay M. Srivastava

The traditional buck regulator provides the steady output voltage with high efficiency and low power dissipation. Various parameters of this regulator can be improved by the placement of Double-Gate (DG) MOSFET. The double-gate MOSFET provides twice the drain current flow, which improves the various parameters of buck regulator structure and inevitably increases the device performance and efficiency. In this research work, these parameters have been analyzed with implemented DG MOSFET buck regulator and realized the total losses 42.676 mW and efficiency 74.208%. This research work has designed a DG MOSFET based buck regulator with the specification of input voltage 12 V, output voltage 3.3 V, maximum output current 40 mA, switching frequency 100 kHz, ripple current of 10%, and ripple voltage of 1%.

Energies ◽  
2019 ◽  
Vol 12 (19) ◽  
pp. 3786 ◽  
Author(s):  
Seok-Hyeong Ham ◽  
Yoon-Geol Choi ◽  
Hyeon-Seok Lee ◽  
Sang-Won Lee ◽  
Su-Chang Lee ◽  
...  

This paper proposes a bidirectional dc–dc converter for residential micro-grid applications. The proposed converter can operate over an input voltage range that overlaps the output voltage range. This converter uses two snubber capacitors to reduce the switch turn-off losses, a dc-blocking capacitor to reduce the input/output filter size, and a 1:1 transformer to reduce core loss. The windings of the transformer are connected in parallel and in reverse-coupled configuration to suppress magnetic flux swing in the core. Zero-voltage turn-on of the switch is achieved by operating the converter in discontinuous conduction mode. The experimental converter was designed to operate at a switching frequency of 40–210 kHz, an input voltage of 48 V, an output voltage of 36–60 V, and an output power of 50–500 W. The power conversion efficiency for boost conversion to 60 V was ≥98.3% in the entire power range. The efficiency for buck conversion to 36 V was ≥98.4% in the entire power range. The output voltage ripple at full load was <3.59 Vp.p for boost conversion (60 V) and 1.35 Vp.p for buck conversion (36 V) with the reduced input/output filter. The experimental results indicate that the proposed converter is well-suited to smart-grid energy storage systems that require high efficiency, small size, and overlapping input and output voltage ranges.


2015 ◽  
Vol 36 ◽  
pp. 51-63 ◽  
Author(s):  
Vandana Kumari ◽  
Manoj Saxena ◽  
Mridula Gupta

This work presents the drain current model using Evanescent Mode Analysis (EMA) for nanoscale Double Gate MOSFET having Gaussian doping profile along the horizontal direction in the channel i.e. from source to drain region. Due to heavily doped channel, band gap narrowing effect is incorporated in the analytical modeling scheme. The various parameters evaluated in this work using analytical modeling scheme are surface potential, electric field, threshold voltage, sub-threshold slope and drain current. The impact of peak Gaussian doping profile on the drain current and trans-conductance has been demonstrated which are important for assessing the analog performance of the device. The results are also compared with the uniformly doped DG MOSFET. The asymmetric behaviour of Gaussian doped DG MOSFET has also been investigated. In addition to this, digital performance of Gaussian doped DG MOSFET has also been assessed using exhaustive device simulation.


Author(s):  
Nithiyananthan Kannan ◽  
Nithiyananthan Kannan ◽  
Sunil Thomas

<p>The main objective of this research work is to develop KY conveter topology for renewable energy sources.Solar energy is the readily available and is the cheapest form of energy. It is non-polluting and environment friendly. The development of high static gain DC-DC converters is an important research area due to the crescent demand of this technology for several applications supplied by low DC output voltage power sources. It is used to provide the uninterruptable power supply and battery powered to the system. So here, step-up DC-DC converters based on the KY converter are proposed for LED lighting systems. The proposed topologies present high voltages and high efficiency for low input voltage and high output voltage applications. The simulation results of the proposed topology have been presented using MATLAB/SIMULINK software.</p>


Electronics ◽  
2021 ◽  
Vol 10 (14) ◽  
pp. 1623
Author(s):  
Bor-Ren Lin

In order to realize emission-free solutions and clean transportation alternatives, this paper presents a new DC converter with pulse frequency control for a battery charger in electric vehicles (EVs) or light electric vehicles (LEVs). The circuit configuration includes a resonant tank on the high-voltage side and two variable winding sets on the output side to achieve wide output voltage operation for a universal LEV battery charger. The input terminal of the presented converter is a from DC microgrid with voltage levels of 380, 760, or 1500 V for house, industry plant, or DC transportation vehicle demands, respectively. To reduce voltage stresses on active devices, a cascade circuit structure with less voltage rating on power semiconductors is used on the primary side. Two resonant capacitors were selected on the resonant tank, not only to achieve the two input voltage balance problem but also to realize the resonant operation to control load voltage. By using the variable switching frequency approach to regulate load voltage, active switches are turned on with soft switching operation to improve converter efficiency. In order to achieve wide output voltage capability for universal battery charger demands such as scooters, electric motorbikes, Li-ion e-trikes, golf carts, luxury golf cars, and quad applications, two variable winding sets were selected to have a wide voltage output (50~160 V). Finally, experiments with a 1 kW rated prototype were demonstrated to validate the performance and benefits of presented converter.


Processes ◽  
2022 ◽  
Vol 10 (1) ◽  
pp. 117
Author(s):  
Yu-Kai Chen ◽  
Hong-Wen Hsu ◽  
Chau-Chung Song ◽  
Yu-Syun Chen

This paper proposes the design and implementation of inductor-inductor-capacitor (LLC) converters with modules connected in series with the power scan method and communication scan network (CSN) to achieve MPPT and regulate the output voltage for the PV micro-grid system. The Dc/Dc converters includes six isolated LLC modules in series to supply ±380 V output voltage and track the maximum power point of the PV system. The series LLC converters are adopted to achieve high efficiency and high flexibility for the PV micro-grid system. The proposed global maximum power scan technique is implemented to achieve global maximum power tracking by adjusting the switching frequency of the LLC converter. To improve the system flexibility and achieve system redundancy, module failure can be detected in real time with a communication scan network, and then the output voltage of other modules will be changed by adjusting the switching frequency to maintain the same voltage as before the failure. Additionally, the proposed communication scan network includes the RS-485 interface of the MPPT series module and the CAN BUS communication interface with other subsystems’ communication for the PV micro-grid application system. Finally, a 6 kW MPPT prototype with a communication scan network is implemented and the proposed control method is verified for the PV system.


2013 ◽  
Vol 3 (1) ◽  
pp. 5-11 ◽  
Author(s):  
Yuriy Denisov ◽  
Serhii Stepenko

Abstract The problems, devoted to power quality and particularly power factor correction, are of great importance nowadays. The key requirements, which should be satisfied according to the energy efficiency paradigm, are not limited only by high quality of the output voltage (low total harmonic distortion), but also assume minimal power losses (high efficiency) in the power factor corrector (PFC). It could be satisfied by the use of quasi-resonant pulse converter (QRPC) due to its high efficiency at high switching frequency instead of the classical pulse-width modulated (PWM) boost converter. A dynamic model of QRPC with zero current switching (ZCS) is proposed. This model takes into account the main features of QRPC-ZCS as a link of a PFC closed-loop system (discreteness, sharp changes of parameters over switching period, input voltage impact on the gain). The synthesized model is also valid for conventional parallel pulse converter over an active interval of commutation. The regulator for current loop of PFC was synthesized based on digital filter using proposed model by the criterion of fast acting.


Energies ◽  
2019 ◽  
Vol 12 (3) ◽  
pp. 394 ◽  
Author(s):  
Dai-Van Vo ◽  
Minh-Khai Nguyen ◽  
Duc-Tri Do ◽  
Youn-Ok Choi

A novel single-phase nine-level boost inverter is proposed in this paper. The proposed inverter has an output voltage which is higher than the input voltage by switching capacitors in series and in parallel. The maximum output voltage of the proposed inverter is determined by using the boost converter circuit, which has been integrated into the circuit. The proposed topology is able to invert the multilevel voltage with the high step-up output voltage, simple structure and fewer power switches. In this paper, the circuit configuration, the operating principle, and the output voltage expression have been derived. The proposed converter has been verified by simulation and experiment with the help of PSIM software and a laboratory prototype. The experimental results match the theoretical calculation and the simulation results.


2018 ◽  
Vol 7 (4.30) ◽  
pp. 240 ◽  
Author(s):  
M. K. R. Noor ◽  
A. Ponniran ◽  
M. A. Z. A. Rashid ◽  
A. A. Bakar ◽  
J. N. Jumadril ◽  
...  

This paper discusses the current total harmonic distortion (THDi) and voltage ripple minimization of SEPIC converter based on parameters design optimization. This conventional PFC SEPIC converter is designed to operate in discontinuous conduction mode in order to achieve almost unity power factor. The passive components, i.e., inductor and capacitor are designed based on switching frequency and resonant frequency. Meanwhile, the ranges of duty cycle for buck and boost operations are between 0<D<0.5 and 0.5<D<1, respectively, for the output voltage variation of the converter. The principle of the parameters design optimization is based on the balancing energy compensation between the input capacitor and output inductor. The experimental results show that, the current THD is reduced to 2.66% from 70.9% after optimization process is conducted. Furthermore, it is confirmed that the output voltage ripple frequency is always double from the input line frequency, fL = 2foutand the output voltage ripple is always lower than the maximum input voltage ripple. Therefore, the designed parameters of the experimental converter is confirmed with approximately 65 W of the converter output power.


Author(s):  
M. A. Z. A. Rashid ◽  
A. Ponniran ◽  
M. K. R. Noor ◽  
J. N. Jumadril ◽  
M. H. Yatim ◽  
...  

This paper presents the optimization of PFC Cuk converter parameter design for the minimization of THD and voltage ripple. In this study, the PFC Cuk converter is designed to operate in discontinuous conduction mode (DCM) in order to achieve almost unity power factor. The passive components, i.e., inductor and capacitor are designed based on switching frequency and resonant frequency. Nevertheless, the ranges of duty cycle for buck and boost operations are 0&lt;D&lt;0.5 and 0.5&lt;D&lt;1, respectively for the output voltage variation of the converter. The principle of the parameters design optimization is based on the balancing energy compensation between the input capacitor and output inductor for minimization of THD current. In addition, the selection of high output capacitance will minimize the output voltage ripple significantly. A 65 W PFC Cuk converter prototype is developed and experimentally tested to confirm the parameters design optimization principle. The experimental results show that the THD current is reduced to 4.5% from 61.3% and the output voltage ripple is reduced to 7 V from 18 V after parameters optimization are realized. Furthermore, it is confirmed that the output voltage ripple frequency is always double of the input line frequency, 50 Hz and the output voltage ripple is always lower than the maximum input voltage ripple.


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