The impact of short channel and quantum effects on the MOS transistor mismatch

2003 ◽  
Vol 47 (7) ◽  
pp. 1161-1165 ◽  
Author(s):  
R Difrenza ◽  
P Llinares ◽  
G Ghibaudo
2002 ◽  
Vol 716 ◽  
Author(s):  
Nihar R. Mohapatra ◽  
Madhav P. Desai ◽  
Siva G. Narendra ◽  
V. Ramgopal Rao

AbstractThe impact of technology scaling on the MOS transistor performance is studied over a wide range of dielectric permittivities using two-dimensional (2-D) device simulations. It is found that the device short channel performance is degraded with increase in the dielectric permittivity due to an increase in dielectric physical thickness to channel length ratio. For Kgate greater than Ksi, we observe a substantial coupling between source and drain regions through the gate dielectric. We provide extensive 2-D device simulation results to prove this point. Since much of the coupling between source and drain occurs through the gate dielectric, it is observed that the overlap length is an important parameter for optimizing DC performance in the short channel MOS transistors. The effect of stacked gate dielectric and spacer dielectric on the MOS transistor performance is also studied to substantiate the above observations.


2019 ◽  
Vol 9 (4) ◽  
pp. 504-511
Author(s):  
Sikha Mishra ◽  
Urmila Bhanja ◽  
Guru Prasad Mishra

Introduction: A new analytical model is designed for Workfunction Modulated Rectangular Recessed Channel-Silicon On Insulator (WMRRC-SOI) MOSFET that considers the concept of groove gate and implements an idea of workfunction engineering. Methods: The impact of Negative Junction Depth (NJD) and oxide thickness (tox) are analyzed on device performances such as Sub-threshold Slope (SS), Drain Induced Barrier Lowering (DIBL) and threshold voltage. Results: The results of the proposed work are evaluated with the Rectangular Recessed Channel-Silicon On Insulator (RRC-SOI) MOSFET keeping the metal workfunction constant throughout the gate region. Furthermore, an analytical model is developed using 2D Poisson’s equation and threshold voltage is estimated in terms of minimum surface potential. Conclusion: In this work, the impact of Negative Junction Depth (NJD) on minimum surface potential and the drain current are also evaluated. It is observed from the analysis that the analog switching performance of WMRRC-SOI MOSFET surpasses RRC-SOI MOSFET in terms of better driving capability, high Ion/Ioff ratio, minimized Short Channel Effects (SCEs) and hot carrier immunity. Results are simulated using 2D Sentaurus TCAD simulator for validation of the proposed structure.


2021 ◽  
Author(s):  
Peter Feher ◽  
Ádám Madarász ◽  
András Stirling

<div>Theoretical prediction of electronic absorption spectra without input from experiment is no easy feat as it requires addressing all the factors that affect line shapes. In practice, however, the methodologies are limited to treat these ingredients only to a certain extent. Here we present a multiscale protocol that addresses the temperature, solvent and nuclear quantum effects, anharmonicity and reconstruction of the final spectra from the individual transitions. First, QM/MM molecular dynamics is conducted to obtain trajectories of solute-solvent configurations, from which the corresponding quantum corrected ensembles are generated through the Generalized Smoothed Trajectory Analysis (GSTA). The optical spectra of the ensembles are then produced by calculating vertical transitions using TDDFT with implicit solvation. To obtain the final spectral shapes, the stick spectra from TDDFT are convoluted with Gaussian kernels where the half-widths are determined by a statistically motivated strategy. We have tested our method by calculating the UV-vis spectra of a recently discovered acridine photocatalyst in two redox states and evaluated the impact of each step. Nuclear quantization affects the relative peak intensities and widths, which is necessary to reproduce the experimental spectrum. We have also found that using only the optimized geometry of each molecule works surprisingly well if a proper empirical broadening factor is applied. This is explained by the rigidity of the conjugated chromophore moieties of the selected molecules which are mainly responsible for the excitations in the spectra. In contrast, we have also shown that the molecules are flexible enough to feature anharmonicities that impair the Wigner sampling. </div>


Author(s):  
Kiran Agarwal Gupta ◽  
V Venkateswarlu ◽  
Dinesh Anvekar ◽  
Sumit Basu

2013 ◽  
Vol 685 ◽  
pp. 185-190
Author(s):  
Slimani Samia ◽  
Djellouli Bouaza

In spite of progress in silicon technology, the end of Mosfet scaling can be anticipated for the year 2015 so the introduction of high permittivity gate dielectric is the envisaged solution to reduce the current leakage that drives up power consumption. In this paper we investigate the impact of different gate length on SOI double gate MOSFET when SiO2 is replaced by ZrO2 as the gate dielectric using Nextnano Simulator. The impact of the quantum effects also observed on performance parameters of the DG-MOSFET such as on current, off current, drain induced barrier lowering, and sub-threshold. It is observed that less EOT with high permittivity reduces the tunnel current and serves to maintain high drive current.


1990 ◽  
Vol 37 (4) ◽  
pp. 1064-1073 ◽  
Author(s):  
R. Gharabagi ◽  
M.A. El-Nokali

2012 ◽  
Vol 67 (6-7) ◽  
pp. 317-326 ◽  
Author(s):  
Alireza Heidari ◽  
Niloofar Heidari ◽  
Foad Khademi Jahromi ◽  
Roozbeh Amiri ◽  
Mohammadali Ghorbani

In this paper, first, the impact of different gate arrangements on the short-channel effects of carbon nanotube field-effect transistors with doped source and drain with the self-consistent solution of the three-dimensional Poisson equation and the Schr¨odinger equation with open boundary conditions, within the non-equilibrium Green function, is investigated. The results indicate that the double-gate structure possesses a quasi-ideal subthreshold oscillation and an acceptable decrease in the drain induced barrier even for a relatively thick gate oxide (5 nm). Afterward, the electrical characteristics of the double-gate carbon nanotube field-effect transistors (DG-CNTFET) are investigated. The results demonstrate that an increase in diameter and density of the nanotubes in the DG-CNTFET increases the on-state current. Also, as the drain voltage increases, the off-state current of the DG-CNTFET decreases. In addition, regarding the negative gate voltages, for a high drain voltage, increasing in the drain current due to band-to-band tunnelling requires a larger negative gate voltage, and for a low drain voltage, resonant states appear


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