Field-Effect Transistors Based on Silicon Nanowire Arrays: Effect of the Good and the Bad Silicon Nanowires

2012 ◽  
Vol 4 (8) ◽  
pp. 4251-4258 ◽  
Author(s):  
Bin Wang ◽  
Thomas Stelzner ◽  
Rawi Dirawi ◽  
Ossama Assad ◽  
Nisreen Shehada ◽  
...  
2012 ◽  
Vol 21 ◽  
pp. 109-115 ◽  
Author(s):  
S. Naama ◽  
T. Hadjersi ◽  
G. Nezzal ◽  
L. Guerbous

One-step metal-assisted electroless chemical etching of p-type silicon substrate in NH4HF2/AgNO3 solution was investigated. The effect of different etching parameters including etching time, temperature, AgNO3 concentration and NH4HF2 concentration were investigated. The etched layers formed were investigated by scanning electron microscopy (SEM) and Photoluminescence. It was found that the etched layer was formed by well-aligned silicon nanowires. It is noted that their density and length strongly depend on etching parameters. Room temperature photoluminescence (PL) from etched layer was observed. It was observed that PL peak intensity increases significantly with AgNO3 concentration.


2011 ◽  
Vol 194-196 ◽  
pp. 598-601
Author(s):  
Xuan Liu ◽  
Li Jie Zhao ◽  
Ping Feng

Electroless metal deposition is a simple, low-cost and effective method for fabricating silicon nanowire arrays and has been used widely in micro electromechanical industry. In this paper, large-area silicon nanowire arrays are prepared successfully with mixed AgNO3and HF solution by this method at normal temperature and pressure. It has been proved the best equality of silicon nanowires can be obtained at the concentration ratio of 0.02 mol/l: 5mol/l for AgNO3and HF and 1h reaction time. The influence of nano metal particles on the growth, the wire diameter, the distribution and the array of silicon nanowires are analyzed. Experimental results show the distribution and wire diameter of silicon nanowires can be controlled effectively by nano metal particles deposited on silicon wafers. The length of silicon nanowires increases with the reaction time and the average growth velocity is predicted to be 0.5~0.7μm/min. The equality of silicon nanowires with nano Au particles is better than those with nano Pt particles. The reaction mechanism of preparing large-area silicon nanowire arrays is analyzed as the result of the deoxidization of silver ion and the removal of the oxidized silicon solution by reacting with HF.


2017 ◽  
Vol 19 (19) ◽  
pp. 11786-11792 ◽  
Author(s):  
Chia-Yun Chen ◽  
Po-Hsuan Hsiao ◽  
Ta-Cheng Wei ◽  
Ting-Chen Chen ◽  
Chien-Hsin Tang

Broad-band and high efficiency photocatalytic systems were demonstrated through the incorporation of silicon nanowires with highly fluorescent carbon nanodots.


2020 ◽  
Vol 10 (3) ◽  
pp. 1146 ◽  
Author(s):  
Kangil Kim ◽  
Jae Keun Lee ◽  
Seung Ju Han ◽  
Sangmin Lee

Silicon nanowires are widely used for sensing applications due to their outstanding mechanical, electrical, and optical properties. However, one of the major challenges involves introducing silicon-nanowire arrays to a specific layout location with reproducible and controllable dimensions. Indeed, for integration with microscale structures and circuits, a monolithic wafer-level process based on a top-down silicon-nanowire array fabrication method is essential. For sensors in various electromechanical and photoelectric applications, the need for silicon nanowires (as a functional building block) is increasing, and thus monolithic integration is highly required. In this paper, a novel top-down method for fabricating vertically-stacked silicon-nanowire arrays is presented. This method enables the fabrication of lateral silicon-nanowire arrays in a vertical direction, as well as the fabrication of an increased number of silicon nanowires on a finite dimension. The proposed fabrication method uses a number of processes: photolithography, deep reactive-ion etching, and wet oxidation. In applying the proposed method, a vertically-aligned silicon-nanowire array, in which a single layer consists of three vertical layers with 20 silicon nanowires, is fabricated and analyzed. The diamond-shaped cross-sectional dimension of a single silicon nanowire is approximately 300 nm in width and 20 μm in length. The developed method is expected to result in highly-sensitive, reproducible, and low-cost silicon-nanowire sensors for various biomedical applications.


2012 ◽  
Vol 11 (04) ◽  
pp. 1240011
Author(s):  
G. ROSAZ ◽  
B. SALEM ◽  
N. PAUC ◽  
P. GENTILE ◽  
A. POTIÉ ◽  
...  

Silicon nanowires (Si NWs) are promising candidates for field-effect transistor (FET) conduction channel. Planar configuration using a back gate is an easy way to study these devices. We demonstrate the possibility to build high performance FET using a simple silicidation process leading to high effective holes' mobility between 130 cm2⋅V-1⋅s-1 and 200 cm2⋅V-1⋅s-1 and good ION/IOFF ratio up to 105. Moreover we investigated the possibility to passivate the NWs using either a high-k dielectric layer or a thermal oxide shell around the NWs. This leads to a reduction of the hysteretic behavior during the gate voltage sweep from 30 V to 1 V depending on the material and the gate configuration.


2004 ◽  
Vol 832 ◽  
Author(s):  
Sarah M. Dilts ◽  
Ahmad Mohmmad ◽  
Kok-Keong Lew ◽  
Joan M. Redwing ◽  
Suzanne E. Mohney

ABSTRACTHigh density boron-doped silicon nanowire arrays were fabricated within the pores of anodized alumina membranes via vapor-liquid-solid (VLS) growth Anodized alumina membranes with a nominal pore diameter of 200 nm served as templates for the sequential electrodeposition of silver, cobalt, and gold which served as the backside electrical contact, ohmic contact metal and catalyst metal for VLS growth, respectively. Boron-doped silicon nanowires were then synthesized within the pores by VLS growth using silane (SiH4) and trimethylboron (TMB) gas sources. Arrays of Al dots were deposited on the top surface of the membrane after nanowire growth. A series of samples was prepared with different SiNW lengths and boron doping levels. Two point probe measurements were used to measure the I-V characteristics of the silicon nanowire arrays before and after annealing. Nanowire resistivity and contact resistance were determined from plots of resistance versus nanowire length. The resistivity of the SiNW was observed to decrease with the addition of TMB during growth.


2012 ◽  
Vol 1408 ◽  
Author(s):  
Alex Katsman ◽  
Michael Beregovsky ◽  
Yuval E. Yaish

ABSTRACTThermally activated axial intrusion of nickel silicides into the silicon nanowire (NW) from pre-patterned Ni reservoirs is used in formation of nickel silicide/silicon contacts in SiNW field effect transistors. This intrusion consists usually of different nickel silicide phases which grow simultaneously during thermal annealing (TA). The growth is often accompanied by local thickening and tapering of the NW, up to full disintegration of segments adjacent to the silicon. In the present work this process was investigated in SiNWs of 30-60 nm in diameters with pre-patterned Ni electrodes after a TA at 420-440°C and times up to 15 s. The process was analyzed in the framework of a model taking into account simultaneous formation of two silicide phases in the NW. Additional flux of atoms caused by the NW curvature gradients due to different radii of different silicides was taken into account as well. For a certain set of parameters thickening of the nickel-rich silicide intrusion and tapering of the monosilicide part of intrusion were obtained.


ACS Omega ◽  
2018 ◽  
Vol 3 (8) ◽  
pp. 8471-8482 ◽  
Author(s):  
Dipti Rani ◽  
Vivek Pachauri ◽  
Narayanan Madaboosi ◽  
Pawan Jolly ◽  
Xuan-Thang Vu ◽  
...  

2011 ◽  
Vol 1350 ◽  
Author(s):  
C. Delacour ◽  
G. Bugnicourt ◽  
G. Bres ◽  
T. Crozes ◽  
C. Villard

ABSTRACTWe present transport properties of silicon nanowires field effect transistors realized on SOI substrates and their application to probe electrical activity of biological objects. Devices are sensitive to short and weak voltage pulses (ms, mV) applied in an electrolyte solution, allowing a future efficient detection of neuronal activity. For that purpose, the organized growth of neuronal cells along chosen patterns has been obtained, leading to an accurate coupling with silicon nanowire field effect transistors. Both network architectures, neural and semiconducting, have been designed to study some aspects of the propagation and the processing of information by the nervous system.


2018 ◽  
Vol 42 (17) ◽  
pp. 14096-14103 ◽  
Author(s):  
Xin Lin ◽  
Shao-Hai Li ◽  
Kang-Qiang Lu ◽  
Zi-Rong Tang ◽  
Yi-Jun Xu

The film composites of n-type CdS QD decorated p-type silicon nanowire arrays are assembled toward H2 evolution with improved photoactivity and photostability.


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