Double-metal-gate nanocrystalline Si thin film transistors with flexible threshold voltage controllability

2013 ◽  
Vol 103 (20) ◽  
pp. 203501 ◽  
Author(s):  
Uio-Pu Chiou ◽  
Jia-Min Shieh ◽  
Chih-Chao Yang ◽  
Wen-Hsien Huang ◽  
Yo-Tsung Kao ◽  
...  
2019 ◽  
Vol 3 (8) ◽  
pp. 81-85
Author(s):  
Hao-Chih Yuan ◽  
Zhenqiang Ma ◽  
Max G. Lagally ◽  
George E. Celler

2011 ◽  
Vol 1321 ◽  
Author(s):  
Sung-Hwan Choi ◽  
Yeon-Gon Mo ◽  
Min-Koo Han

ABSTRACTWe have investigated the stability of short channel (1.5μm) p-Type polycrystalline silicon (poly-Si) Thin Film Transistors (TFTs) on the glass substrate under AC bias stress. The variation of threshold voltage in short channel poly-Si TFT was considerably higher than that of long channel poly-Si TFT. Threshold voltage of the short channel TFT was considerably moved to the positive direction during AC bias stress, whereas the threshold voltage of a long channel was rarely moved. The variation of threshold voltage in the short channel p-type TFT under AC bias stess was more compared to that under DC bias stress. The threshold voltage of short channel (L=1.5μm) poly-Si TFT was increased about -7.44V from -0.305V to -7.745V when VGS = 5 (base value) ~ -15V (peak value), VDS = -15V was applied for 3,000 seconds. This positive shift of threshold voltage and significantly degraded s-swing value in the short channel TFT under dynamic stress (AC) may be due to the increase of the stress-induced trap state density at gate insulator / channel interface region.


2010 ◽  
Vol 57 (11) ◽  
pp. 3186-3189 ◽  
Author(s):  
Hung-Chang Sun ◽  
Ching-Fang Huang ◽  
Yen-Ting Chen ◽  
Ting-Yun Wu ◽  
Chee Wee Liu ◽  
...  

2003 ◽  
Vol 769 ◽  
Author(s):  
Nigel D. Young ◽  
Michael J. Trainor ◽  
Soo-Young Yoon ◽  
David J. McCulloch ◽  
Richard W. Wilks ◽  
...  

AbstractA variety of polymer materials including polyimide (PI), polyarylate (PAR), polynorbonene (PNB) and polyethersulphone (PES) have been studied for use as substrates in the formation of active matrix displays based upon polycrystalline silicon (poly-Si) thin film transistors (TFTs). A process used to fabricate transflective mobile phone displays at 250°C on such substrates is described in detail. The NMOS TFTs show a mobility of 100cm2/Vs, and a threshold voltage of 3.9V; the PMOS devices have a mobility of 52cm2/Vs, and a threshold voltage of -6V. Issues relating to performance of these devices, yield of the arrays, and manufacturability are discussed.


Author(s):  
Benjamin King ◽  
Andrew J. Daszczynski ◽  
Nicole A. Rice ◽  
Alexander J. Peltekoff ◽  
Nathan J. Yutronkie ◽  
...  

Micromachines ◽  
2021 ◽  
Vol 12 (3) ◽  
pp. 327
Author(s):  
Je-Hyuk Kim ◽  
Jun Tae Jang ◽  
Jong-Ho Bae ◽  
Sung-Jin Choi ◽  
Dong Myong Kim ◽  
...  

In this study, we analyzed the threshold voltage shift characteristics of bottom-gate amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) under a wide range of positive stress voltages. We investigated four mechanisms: electron trapping at the gate insulator layer by a vertical electric field, electron trapping at the drain-side GI layer by hot-carrier injection, hole trapping at the source-side etch-stop layer by impact ionization, and donor-like state creation in the drain-side IGZO layer by a lateral electric field. To accurately analyze each mechanism, the local threshold voltages of the source and drain sides were measured by forward and reverse read-out. By using contour maps of the threshold voltage shift, we investigated which mechanism was dominant in various gate and drain stress voltage pairs. In addition, we investigated the effect of the oxygen content of the IGZO layer on the positive stress-induced threshold voltage shift. For oxygen-rich devices and oxygen-poor devices, the threshold voltage shift as well as the change in the density of states were analyzed.


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