Some effects of planar defects near the Si/SiO2interface on electrical properties of silicon‐on‐sapphire/MOS devices

1978 ◽  
Vol 33 (8) ◽  
pp. 773-775 ◽  
Author(s):  
M. S. Abrahams ◽  
W. E. Ham
Keyword(s):  
Electrical Properties ◽  
Planar Defects ◽  
Mos Devices

Influences of Plasma Processed Interface Layers on Germanium MOS Devices with ALD Grown HfO2

2007 ◽  
Vol 996 ◽  
Author(s):  
Takuya Sugawara ◽  
Raghavasimhan Sreenivasan ◽  
Yasuhiro Oshima ◽  
Paul C. McIntyre
Keyword(s):  
Electrical Properties ◽  
Interface Layer ◽  
Hafnium Dioxide ◽  
Passivation Layer ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Mos Capacitors ◽  
Mos Devices ◽  
Interface Layers ◽  
Silicon Based

AbstractGermanium and hafnium-dioxide (HfO2) stack structures' physical and electrical properties were studied based on the comparison of germanium and silicon based metal-oxide-semiconductor (MOS) capacitors' electrical properties. In germanium MOS capacitor with oxide/oxynitride interface layer, larger negative flat-band-voltage (Vfb) shift compared with silicon based MOS capacitors was observed. Secondary ion mass spectrum (SIMS) characteristics of HfO2-germanium stack structure with germanium oxynitride (GeON) interfacial layer showed germanium out diffusion into HfO2. These results indicate that the germanium out diffusion into HfO2 would be the origin of the germanium originated negative Vfb shift. Using Ta3N5 layer as a germanium passivation layer, reduced Vfb shift and negligible hysteresis were observed. These results suggest that the selection of passivation layer strongly influences the electrical properties of germanium based MOS devices.

Electrical properties of MOS devices made with SILO technology

1982 ◽  
Author(s):  
J. Hui ◽  
T.Y. Chiu ◽  
S. Wong ◽  
W.G. Oldham
Keyword(s):  
Electrical Properties ◽  
Mos Devices

Novel Approach for Improving Interface Quality of 4H-SiC MOS Devices with UV Irradiation and Subsequent Thermal Annealing

2013 ◽  
Vol 740-742 ◽  
pp. 741-744 ◽  
Author(s):  
Heiji Watanabe ◽  
Daisuke Ikeguchi ◽  
Takashi Kirino ◽  
Shuhei Mitani ◽  
Yuki Nakano ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Thermal Annealing ◽  
Uv Irradiation ◽  
Uv Light ◽  
Interface State ◽  
State Density ◽  
Mos Devices ◽  
Novel Approach ◽  
Subsequent Thermal Annealing ◽  
Thermally Grown

We report on the harmful impact of ultraviolet (UV) light irradiation on thermally grown SiO2/4H-SiC(0001) structures and its use in subsequent thermal annealing for improving electrical properties of SiC-MOS devices. As we previously reported [1], significant UV-induced damage, such as positive flatband voltage shift and hysteresis in capacitance-voltage curves as well as increased interface state density, was observed for SiC-MOS devices with thermally grown oxides. Interestingly, the subsequent annealing of damaged SiO2/SiC samples resulted in superior electrical properties to those for untreated (fresh) devices. These findings imply that UV irradiation of the SiO2/SiC structure is effective for eliciting pre-existing carbon-related defects and transforming them into a simple configuration that can be easily passivated by thermal treatment.

3C-SiC Monocrystals Grown on Undulant Si(001) Substrates

2002 ◽  
Vol 742 ◽  
Author(s):  
Hiroyuki Nagasawa ◽  
Kuniaki Yagi ◽  
Takamitsu Kawahara ◽  
Naoki Hatta
Keyword(s):  
Electrical Properties ◽  
Stacking Faults ◽  
X Ray Diffraction ◽  
Growth Step ◽  
Planar Defects ◽  
X Ray ◽  
Step Flow ◽  
Si Substrates ◽  
Novel Technique ◽  
Initial Stage

ABSTRACTA novel technique to reduce planar defects in 3C-SiC is to grow it on “undulant-Si” substrates, on which the surface forms countered slopes oriented in the [110] and [110] directions. In the initial stage of 3C-SiC growth, step flow epitaxy occurs on each slope of the substrate, reducing the anti-phase boundaries. Then, the stacking faults in the (111) and (111) planes are gradually annihilated by combining with counter-stacking faults, while those parallel to (111) and (111) vanish. The freestanding 3C-SiC exhibits anisotropy in its electrical properties. The origin of the anisotropy in electrical properties is discussed by referring to the results of X-ray diffraction study.

In situ cleaning effect on the electrical properties of Ge MOS devices by Ar gas anneal

2006 ◽  
Vol 53 (10) ◽  
pp. 2661-2664 ◽  
Author(s):  
Weiping Bai ◽  
Nan Lu ◽  
A.P. Ritenour ◽  
M.L. Lee ◽  
D.A. Antoniadis ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Mos Devices ◽  
Ar Gas

Gamma irradiation-induced effects on the electrical properties of HfO2-based MOS devices

2016 ◽  
Vol 171 (1-2) ◽  
pp. 77-86 ◽  
Author(s):  
N. Manikanthababu ◽  
N. Arun ◽  
M. Dhanunjaya ◽  
S.V.S. Nageswara Rao ◽  
A. P. Pathak
Keyword(s):  
Electrical Properties ◽  
Gamma Irradiation ◽  
Mos Devices

Observation of radiation induced changes in stress and electrical properties in MOS devices

1992 ◽  
Vol 39 (6) ◽  
pp. 2146-2151 ◽  
Author(s):  
D.C. Shaw ◽  
L. Lowry ◽  
K.P. MacWilliams ◽  
C.E. Barnes
Keyword(s):  
Electrical Properties ◽  
Mos Devices ◽  
Radiation Induced ◽  
Induced Changes

Inversion-Channel MOS Devices for Characterization of 4H-SiC/SiO2 Interfaces

2015 ◽  
Vol 821-823 ◽  
pp. 480-483 ◽  
Author(s):  
A.I. Mikhaylov ◽  
Alexey V. Afanasyev ◽  
V.V. Luchinin ◽  
S.A. Reshanov ◽  
Adolf Schöner ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Gate Oxide ◽  
Process Optimisation ◽  
Gate Oxides ◽  
Mos Structure ◽  
Mos Devices ◽  
Inversion Channel ◽  
And Inversion ◽  
Thermally Grown

Electrical properties of the gate oxides thermally grown in N2O on n-type and p-type 4H-SiC have been compared using conventional MOS structure and inversion-channel MOS structure, respectively. Sufficient difference in the electrical properties of the gate oxides grown on n-type and p-type 4H-SiC was revealed. We conclude that the gate oxide process optimisation using inversion-channel MOS devices is superior as compared to the conventional MOS structure.

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