Performance Improvement of Pi-gate SOI MOSFET Transistor using High-k Dielectric with Metal Gate

2015 ◽  
Vol 62 (3) ◽  
pp. 331-338 ◽  
Author(s):  
Fatima Zohra Rahou ◽  
A. Guen Bouazza ◽  
B. Bouazza
Author(s):  
Ameer F. Roslan ◽  
F. Salehuddin ◽  
A. S. M. Zain ◽  
K. E. Kaharudin ◽  
I. Ahmad

<p><span>In this research, the performance of the 19 nm single gate MOSFET is enhanced through the implementation of the high permittivity dielectric material. The MOSFET scaling trends necessities in device dimensions can be satisfied through the implementation of the high-K dielectric materials in place of the SiO2. Therefore, the 19 nm n-channel MOSFET device with different High-K dielectric materials are implemented and its performance improvement has also been analysed. Virtual fabrication is exercised through ATHENA module from Silvaco TCAD tool. Meanwhile, the device characteristic was utilized by using an ATLAS module. The aforementioned materials have also been simulated and compared with the conventional gate oxide SiO2 for the same structure. At the end, the results have proved that Titanium oxide (TiO2) device is the best dielectric material with a combination of metal gate Tungsten Silicides (WSix). The drive current (ION) of this device (WSix/TiO2) is 587.6 µA/um at 0.534 V of threshold voltage (VTH) as opposed to the targeted 0.530 V predicted, as well as a relatively low IOFF that is obtained at 1.92 pA/µm. This ION value meets the minimum requirement predicted by International Technology Roadmap for Semiconductor (ITRS) 2013 prediction for low performance <br /> (LP) technology. </span></p>


2008 ◽  
Vol 57 (6) ◽  
pp. 3807
Author(s):  
Luan Su-Zhen ◽  
Liu Hong-Xia ◽  
Jia Ren-Xu ◽  
Cai Nai-Qiong

2006 ◽  
Vol 917 ◽  
Author(s):  
Mikael Casse ◽  
Laurent Thevenod ◽  
Bernard Guillaumot ◽  
Lucie Tosti ◽  
Vincent Cosnier ◽  
...  

AbstractWe have investigated the impact of a metal gate (TiN) and high-k dielectric (HfO2) on the carrier mobility. We have shown that strong remote Coulomb scattering (RCS) due to charges in the HfO2 layer (either grown by ALD or MOCVD) mostly degrades the mobility at low/medium field. High amount of charges (>1013cm-2) is needed to explain the 30% degradation observed in devices with a thin interface layer. These additional coulombic interactions are effective for bottom oxide up to 2nm. We have developed a RCS model to fully explain the experimental data. The influence of the metal gate is also evidenced. The latter has a significative impact on the Si/SiO2 interface roughness, and may induce some additional coulombic interactions.


Sign in / Sign up

Export Citation Format

Share Document