Application of double camel-like gate structures for a GaAs field-effect transistor with extremely high potential barrier height and gate turn-on voltage

2006 ◽  
Vol 21 (8) ◽  
pp. 1132-1138 ◽  
Author(s):  
Jung-Hui Tsai ◽  
Shao-Yen Chiu ◽  
Wen-Shiung Lour ◽  
Der-Feng Guo ◽  
Wen-Chau Liu
Keyword(s):  
Barrier Height ◽  
Potential Barrier ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Potential Barrier Height ◽  
High Potential ◽  
Turn On ◽  
High Potential Barrier ◽  
Effect Transistor

scholarly journals Monolayer MoS2 field effect transistor with low Schottky barrier height with ferromagnetic metal contacts

2019 ◽  
Vol 9 (1) ◽  
Author(s):  
Sachin Gupta ◽  
F. Rortais ◽  
R. Ohshima ◽  
Y. Ando ◽  
T. Endo ◽  
...  
Keyword(s):  
Schottky Barrier ◽  
Barrier Height ◽  
Gate Voltage ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Schottky Barrier Height ◽  
Metal Contacts ◽  
Back Gate ◽  
Vapor Deposition Technique ◽  
Effect Transistor

AbstractTwo-dimensional MoS2 has emerged as promising material for nanoelectronics and spintronics due to its exotic properties. However, high contact resistance at metal semiconductor MoS2 interface still remains an open issue. Here, we report electronic properties of field effect transistor devices using monolayer MoS2 channels and permalloy (Py) as ferromagnetic (FM) metal contacts. Monolayer MoS2 channels were directly grown on SiO2/Si substrate via chemical vapor deposition technique. The increase in current with back gate voltage (Vg) shows the tunability of FET characteristics. The Schottky barrier height (SBH) estimated for Py/MoS2 contacts is found to be +28.8 meV (at Vg = 0V), which is the smallest value reported so-far for any direct metal (magnetic or non-magnetic)/monolayer MoS2 contact. With the application of positive gate voltage, SBH shows a reduction, which reveals ohmic behavior of Py/MoS2 contacts. Low SBH with controlled ohmic nature of FM contacts is a primary requirement for MoS2 based spintronics and therefore using directly grown MoS2 channels in the present study can pave a path towards high performance devices for large scale applications.

Use of Vacuum as a Gate Dielectric: The SiC VacFET

2011 ◽  
Vol 679-680 ◽  
pp. 657-661 ◽  
Author(s):  
Kevin M. Speer ◽  
Philip G. Neudeck ◽  
Mehran Mehregany
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Gate Dielectric ◽  
Vacuum Field ◽  
Analytical Design ◽  
Turn On ◽  
Device Architecture ◽  
Effect Transistor ◽  
Output Characteristics ◽  
Processing Techniques

We introduce the vacuum field-effect transistor (VacFET), the first SiC FET to use a vacuum-sealed cavity in place of the traditional, solid gate dielectric. This device architecture eliminates the need to thermally oxidize the SiC surface, a practice which has been widely reported to inhibit the performance and reliability of SiC MOSFETs. Using a combination of batch-compatible electronics and micromachining processing techniques, a polycrystalline SiC bridge is suspended above a 4H-SiC substrate, and the underlying cavity is sealed under vacuum. The fundamental studies made possible by such a device could shed much-needed light on the basic electronic properties of an inverted SiC surface. In this introductory report, we detail the analytical design and fabrication necessary to manufacture the VacFET, and we also demonstrate proof of the concept using turn-on and output characteristics of the first functional SiC device.

Investigation of Parameters for Schottky Barrier (SB) Height for Schottky Barrier Based Carbon Nanotube Field Effect Transistor Device

2020 ◽  
Vol 15 (7) ◽  
pp. 783-791
Author(s):  
Anil Kumar Bhardwaj ◽  
Sumeet Gupta ◽  
Balwinder Raj
Keyword(s):  
Dielectric Constant ◽  
Carbon Nanotube ◽  
Schottky Barrier ◽  
Barrier Height ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Schottky Barrier Height ◽  
Oxide Thickness ◽  
Proper Choice ◽  
Effect Transistor

The design and development of Schottky Barrier Carbon Nanotube Field Effect Transistor (SB CNTFET) is still in the primitive research phase for its utilization in digital design. There is an immediate requirement for the analysis of parametric relations with structural factors to benefit the researchers working in this field. This work helps in the improvement of SB based CNTFET devices to be used in the development of various circuit applications. In this work, investigation of Schottky Barrier height on the performance of SB CNTFET for various geometrical and physical design parameters at the device level has been reported. The analysis of various device parameters of carbon nanotube, i. e., chirality, diameter, band gap, oxide thickness and dielectric constant has been carried out viz. subthreshold conduction, and ION/IOFF ratio. The paper also reports the effect of high dielectric constant material in SB CNTFET with oxide thickness along with Schottky Barrier Height Variation. The performance of SB CNTFET with variation in Schottky Barrier height and temperature variation is also reported. The results obtained indicate that performance of SB based CNTFET can be modified by the proper choice of chirality, dielectrics, oxide thickness and operating temperature. The SB parameter can be optimized by proper choice of metal contact in case of CNTFET.

scholarly journals Impactful Study of F-shaped Tunnel FET

2021 ◽  
Author(s):  
PRABHAT SINGH ◽  
DHARMENDRA SINGH YADAV
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Source Region ◽  
Gate Oxide ◽  
Crowding Effect ◽  
Turn On ◽  
Tunnel Fet ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor ◽  
The Impact

Abstract In this proposed work, a novel single gate F-shaped channel tunnel field effect transistor (SG-FC-TFET) is proposed and investigated. The impact of thickness of the source region and lateral tunneling length between the gate oxide and edge of the source region on analog and radio frequency parameters are investigated with appropriate source and drain lateral length through the 2D-TCAD tool. The slender shape of the source enhanced the electric le crowding effect at the corners of the source region which reflect in term of high On-current (Ion). The Ion of proposed device is increased up to 10-4 A=μm with reduced sub-threshold swing (SS) is 7.3 mV/decade and minimum turn-ON voltage (Von = 0.28 V). The analog/RF parameters of SG-FC-TFET are optimized.

scholarly journals F-Shaped Tunnel Field-Effect Transistor (TFET) for the Low-Power Application

Micromachines ◽  
2019 ◽  
Vol 10 (11) ◽  
pp. 760 ◽  
Author(s):  
Seunghyun Yun ◽  
Jeongmin Oh ◽  
Seokjung Kang ◽  
Yoon Kim ◽  
Jang Hyun Kim ◽  
...  
Keyword(s):  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Electrical Characteristics ◽  
Turn On ◽  
Crowding Effects ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor ◽  
Power Application ◽  
Aided Design

In this report, a novel tunnel field-effect transistor (TFET) named ‘F-shaped TFET’ has been proposed and its electrical characteristics are analyzed and optimized by using a computer-aided design simulation. It features ultra-thin and a highly doped source surrounded by lightly doped regions. As a result, it is compared to an L-shaped TFET, which is a motivation of this work, the F-shaped TFET can lower turn-on voltage (VON) maintaining high on-state current (ION) and low subthreshold swing (SS) with the help of electric field crowding effects. The optimized F-shaped TFET shows 0.4 V lower VON than the L-shaped TFET with the same design parameter. In addition, it shows 4.8 times higher ION and 7 mV/dec smaller average SS with the same VON as that for L-shaped TFET.

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