scholarly journals Momentum relaxation effects in 2D-Xene field effect device structures

2021 ◽  
Author(s):  
Anirban Basak ◽  
Pratik Brahma ◽  
Bhaskaran Muralidharan
Keyword(s):  
Field Effect ◽  
Relaxation Effects ◽  
Device Structures ◽  
Momentum Relaxation

New device structures for graphene nanoribbon field effect transistors

2016 ◽  
Vol 6 (3) ◽  
pp. 265-270 ◽  
Author(s):  
Mahdiar Ghadiry ◽  
Harith Ahmad ◽  
Chong Wu Yi ◽  
Asrulnizam Abd Manaf
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Graphene Nanoribbon ◽  
New Device ◽  
Device Structures

Low Temperature Device Processing Technology for II-VI Semiconductors

1989 ◽  
Vol 161 ◽  
Author(s):  
D.L. Dreifus ◽  
R.M. Kolbas ◽  
B.P. Sneed ◽  
J.F. Schetzina
Keyword(s):  
Low Temperature ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Epitaxial Layers ◽  
Processing Technologies ◽  
Device Processing ◽  
Device Structures ◽  
Lift Off ◽  
Processing Steps

ABSTRACTLow temperature (<60° C) processing technologies that avoid potentially damaging processing steps have been developed for devices fabricated from II-VI semiconductor epitaxial layers grown by photoassisted molecular beam epitaxy (MBE). These low temperature technologies include: 1) photolithography (1 µm geometries), 2) calibrated etchants (rates as low as 30 Å/s), 3) a metallization lift-off process employing a photoresist profiler, 4) an interlevel metal dielectric, and 5) an insulator technology for metal-insulator-semiconductor (MIS) structures. A number of first demonstration devices including field-effect transistors and p-n junctions have been fabricated from II-VI epitaxial layers grown by photoassisted MBE and processed using the technology described here. In this paper, two advanced device structures, processed at <60° C, will be presented: 1) CdTe:As-CdTe:In p-n junction detectors, grown in situ by photoassisted MBE, and 2) HgCdTe-HgTe-CdZnTe quantum-well modulation-doped field-effect transistors (MODFETs).

scholarly journals Gallium nitride heterostructure field-effect transistor with a heat-removal system based on a trench in the passivation layer filled by a high thermal conductivity material

Doklady BGUIR ◽  
2021 ◽  
Vol 19 (6) ◽  
pp. 74-82
Author(s):  
V. S. Volcheck ◽  
V. R. Stempitsky
Keyword(s):  
Thermal Conductivity ◽  
Gallium Nitride ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Heat Removal ◽  
High Thermal Conductivity ◽  
Device Structures ◽  
Effect Transistor ◽  
Heat Removal System ◽  
Removal System

The self-heating effect poses a main problem for high-power electronic and optoelectronic devices based on gallium nitride. A non-uniform distribution of the dissipated power and a rise of the average temperature inside the gallium nitride heterostructure field-effect transistor lead to the formation of a hot spot near the conducting channel and result in the degradation of the drain current, output power and device reliability. The purpose of this work is to develop the design of a gallium nitride heterostructure field-effect transistor with an effective heat-removal system and to study using numerical simulation the thermal phenomena specific to this device. The objects of the research are the device structures formed on sapphire, each of whom features both a graphene heat-eliminating element on its top surface and a trench in the passivation layer filled by a high thermal conductivity material. The subject of the research is the electrical and thermal characteristics of these device structures. The simulation results verify the effectiveness of the integration of the heat-removal system into the gallium nitride heterostructure field-effect transistor that can mitigate the self-heating effect and improve the device performance. The advantage of our concept is that the graphene heat-eliminating element is structurally connected with a heat sink and is designed for removing the heat immediately from the maximum temperature area through the trench in which a high thermal conductivity material is deposited. The results can be used by the electronics industry of the Republic of Belarus for developing the hardware components of gallium nitride power electronics.

TEM characterization of SiGe heterolayers grown on SIMOX

1991 ◽  
Vol 49 ◽  
pp. 886-887
Author(s):  
N. David Theodore ◽  
Peter Fejes ◽  
Mamoru Tomozane ◽  
Ming Liaw
Keyword(s):  
Vapor Deposition ◽  
Infrared Detectors ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Chemical Vapor ◽  
Silicon On Insulator ◽  
Strain Fields ◽  
Device Structures ◽  
Defect Densities

SiGe heterolayers are of interest for use in heterojunction transistors, infrared detectors and field-effect transistors. SIMOX (Separation of silicon by IMplanted OXygen) is useful for fabrication of silicon-on-insulator (SOI) structures (electrically isolated from the substrate). SIMOX could potentially be used for isolation of SiGe structures from the substrate. Epitaxial-Si grown on SIMOX (required for some device structures) can have grown-in dislocations that arise due to STMOX-related damage. If SiGe heterolayers were grown on silicon, dislocations could interact with the strain fields associated with the SiGe layers. Such interaction could possibly lead to a reduction in defect densities in upper layers of the structures. In the present study, SiGe heterolayers grown on SIMOX by chemical vapor deposition were characterized using TEM. The structures consisted of epi-silicon grown on a Si/Sii-xGex superlattice which was in turn grown on a Si/SiO2 (SIMOX) structure. The behavior of defects in the structures was of interest.

Sign in / Sign up

Export Citation Format

Share Document