High-voltage amorphous silicon thin-film transistors

ABSTRACTWe have developed a means to speed up the recovery of both the threshold voltage shift of hydrogenated amorphous silicon (a-Si:H) transistors and the Vx shift of high voltage a-Si devices. This is accomplished by placing a lightly doped compensated layer adjacent to the active layer in these transistors. This proximity recovery layer does not alter the initial characteristics of a-Si:H transistors and is completely process compatible with standard fabrication procedures.

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High Voltage Effects in Top Gate Amorphous Silicon Thin Film Transistors

MRS Proceedings ◽

10.1557/proc-621-q8.5.1 ◽

2000 ◽

Vol 621 ◽

Cited By ~ 1

Author(s):

N. Tosic ◽

F. G. Kuper ◽

T. Mouthaan

Keyword(s):

Thin Film ◽

Temperature Distribution ◽

Amorphous Silicon ◽

High Voltage ◽

Thin Film Transistors ◽

Channel Length ◽

Thermal Heating ◽

Silicon Thin Film ◽

Self Heating ◽

Channel Lengths

ABSTRACTIn this paper, an analysis of the high voltage induced degradation in top gate amorphous silicon Thin Film Transistors (TFT) will be shown, including the aspect of self-heating. It will be shown through experimental results that the degradation level under high voltages on drain and gate is different for TFT's with different channel lengths. In addition, the temperature distribution over the TFT area for devices with different channel length is simulated. Simulation shows that the peak of temperature distribution is located at the drain/channel edge and that level of thermal heating depends on the channel length.

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The Instability Characteristics of Amorphous Silicon Thin Film Transistors with Various Interfacial and Bulk Defect States

Japanese Journal of Applied Physics ◽

10.1143/jjap.36.6226 ◽

1997 ◽

Vol 36 (Part 1, No. 10) ◽

pp. 6226-6229 ◽

Cited By ~ 1

Author(s):

Huang-Chung Cheng ◽

Jun-Wei Tsai ◽

Chun-Yao Huang ◽

Fang-Chen Luo ◽

Hsing-Chien Tuan

Keyword(s):

Thin Film ◽

Amorphous Silicon ◽

Thin Film Transistors ◽

Defect States ◽

Silicon Thin Film

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Hot-Wire Deposited Amorphous Silicon Thin-Film Transistors

MRS Proceedings ◽

10.1557/proc-424-31 ◽

1996 ◽

Vol 424 ◽

Cited By ~ 1

Author(s):

R. E. I. Schropp ◽

K. F. Feenstra ◽

C. H. M. Van Der Werf ◽

J. Holleman ◽

H. Meiling

Keyword(s):

Thin Film ◽

Amorphous Silicon ◽

Thin Film Transistors ◽

Gate Dielectric ◽

Chemical Vapor ◽

Current Crowding ◽

Hot Wire ◽

Saturation Regime ◽

Silicon Thin Film ◽

Order Of Magnitude

AbstractWe present the first thin film transistors (TFTs) incorporating a low hydrogen content (5 - 9 at.-%) amorphous silicon (a-Si:H) layer deposited by the Hot-Wire Chemical Vapor Deposition (HWCVD) technique. This demonstrates the possibility of utilizing this material in devices. The deposition rate by Hot-Wire CVD is an order of magnitude higher than by Plasma Enhanced CVD. The switching ratio for TFTs based on HWCVD a-Si:H is better than 5 orders of magnitude. The field-effect mobility as determined from the saturation regime of the transfer characteristics is still quite poor. The interface with the gate dielectric needs further optimization. Current crowding effects, however, could be completely eliminated by a H2 plasma treatment of the HW-deposited intrinsic layer. In contrast to the PECVD reference device, the HWCVD device appears to be almost unsensitive to bias voltage stressing. This shows that HW-deposited material might be an approach to much more stable devices.

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