scholarly journals 50-kW 1kV DC bus air-cooled inverter with 1.7 kV SiC MOSFETs and 3D-printed novel power module packaging structure for grid applications

Author(s):  
Madhu Chinthavali ◽  
Zhiqiang Jack Wang ◽  
Steven Campbell ◽  
Tong Wu ◽  
Burak Ozpineci
2018 ◽  
Vol 924 ◽  
pp. 845-848 ◽  
Author(s):  
Madhu Sudhan Chinthavali ◽  
Zhi Qiang Wang

This paper presents the design and development of a 30-kW 3D printed based air-cooled silicon carbide (SiC) inverter for electric vehicle application. Specifically, an all-SiC air-cooled power module is designed, aiming at reduced thermal resistance for high temperature and high power density operation. The module assembly incorporates three major parts: an optimized 3D printed heat sink, a SiC MOSFET phase leg module, and a two-channel gate driver. The electrical and thermal performance of the power module is evaluated through double pulse test and continuous operation. Based on the air-cooled power module, a three-phase half-bridge voltage source inverter with 3D-printed air duct is built and tested to further verify the performance of the power module.


2015 ◽  
Vol 2015 (1) ◽  
pp. 000359-000364 ◽  
Author(s):  
Adam Morgan ◽  
Ankan De ◽  
Haotao Ke ◽  
Xin Zhao ◽  
Kasunaidu Vechalapu ◽  
...  

The main motivation of this work is to design, fabricate, test, and compare an alternative, robust packaging approach for a power semiconductor current switch. Packaging a high voltage power semiconductor current switch into a single power module, compared to using separate power modules, offers cost, performance, and reliability advantages. With the advent of Wide-Bandgap (WBG) semiconductors, such as Silicon-Carbide, singular power electronic devices, where a device is denoted as a single transistor or rectifier unit on a chip, can now operate beyond 10kV–15kV levels and switch at frequencies within the kHz range. The improved voltage blocking capability reduces the number of series connected devices within the circuit, but challenges power module designers to create packages capable of managing the electrical, mechanical, and thermal stresses produced during operation. The non-sinusoidal nature of this stress punctuated with extremely fast changes in voltage and current, with respect to time, leads to non-ideal electrical and thermal performance. An optimized power semiconductor series current switch is fabricated using an IGBT (6500V/25A die) and SiC JBS Diode (6000V/10A), packaged into a 3D printed housing, to create a composite series current switch package (CSCSP). The final chosen device configuration was simulated and verified in an ANSYS software package. Also, the thermal behavior of such a composite package was simulated and verified using COMSOL. The simulated results were then compared with empirically obtained data, in order to ensure that the thermal ratings of the power devices were not exceeded; directly affecting the maximum attainable frequency of operation for the CSCSP. Both power semiconductor series current switch designs are tested and characterized under hard switching conditions. Special attention is given to ensure the voltage stress across the devices is significantly reduced.


2019 ◽  
Vol 55 (6) ◽  
pp. 6256-6265 ◽  
Author(s):  
Zhiqiang Wang ◽  
Madhu Chinthavali ◽  
Steven L. Campbell ◽  
Tong Wu ◽  
Burak Ozpineci

Author(s):  
Zhizhao Huang ◽  
Cai Chen ◽  
Yue Xie ◽  
Yiyang Yan ◽  
Yong Kang ◽  
...  

2019 ◽  
Vol 34 (6) ◽  
pp. 5579-5593 ◽  
Author(s):  
Cai Chen ◽  
Zhizhao Huang ◽  
Lichuan Chen ◽  
Yifan Tan ◽  
Yong Kang ◽  
...  

2019 ◽  
Vol 2019 (1) ◽  
pp. 000563-000567
Author(s):  
Zhiwei Wang ◽  
Chi Zhang ◽  
Yiyang Yan ◽  
Cai Chen ◽  
Yong Kang

Abstract This paper presents a 1200V/24A SiC half-bridge power module with ultra-low parasitic capacitance and inductance for low CM EMI. This module is improved from a stacked substrate hybrid packaging structure by optimizing the copper pattern. The parasitic capacitance reduction methods and the trade-off optimization for geometrical parameters are given. The parasitic capacitance of the output node is reduced by 70% compared to the original module. The parasitic capacitance and inductance of the proposed module are 6.8pF and 5.5nH respectively. The EMI simulation shows the proposed module can reduce CM EMI by about 9 dB, while the EMI test result shows a maximum of 6 dB reduction.


2019 ◽  
Vol 2019 (1) ◽  
pp. 000557-000562
Author(s):  
Zhiwei Wang ◽  
Chi Zhang ◽  
Zhizhao Huang ◽  
Cai Chen ◽  
Fang Luo

Abstract This paper proposed a novel stacked DBCs hybrid package structure and designed a low inductive 1200V/120A SiC half-bridge power module based on the package structure. Using the multi-layer structure of DBC+DBC, the main loop parasitic inductance of the power module has been reduced to 1.8nH by optimizing the three-dimensional commutation loop and using the mutual inductance cancellation concept. The module was designed and fabricated, the low inductance characteristics of the module was verified by dual pulse testing and power testing. Dynamic test results show that the module can switch safely with a low overvoltage under zero ohm external drive resistance, and the switching loss is reduced by 57% compared to commercial modules.


Sign in / Sign up

Export Citation Format

Share Document