An EMI Suppression Method in SiC Half-bridge Power Module Design

2019 ◽  
Vol 2019 (1) ◽  
pp. 000563-000567
Author(s):  
Zhiwei Wang ◽  
Chi Zhang ◽  
Yiyang Yan ◽  
Cai Chen ◽  
Yong Kang
Keyword(s):  
Parasitic Capacitance ◽  
Geometrical Parameters ◽  
Power Module ◽  
Output Node ◽  
Trade Off ◽  
Module Design ◽  
Reduction Methods ◽  
Suppression Method ◽  
Packaging Structure ◽  
Test Result

Abstract This paper presents a 1200V/24A SiC half-bridge power module with ultra-low parasitic capacitance and inductance for low CM EMI. This module is improved from a stacked substrate hybrid packaging structure by optimizing the copper pattern. The parasitic capacitance reduction methods and the trade-off optimization for geometrical parameters are given. The parasitic capacitance of the output node is reduced by 70% compared to the original module. The parasitic capacitance and inductance of the proposed module are 6.8pF and 5.5nH respectively. The EMI simulation shows the proposed module can reduce CM EMI by about 9 dB, while the EMI test result shows a maximum of 6 dB reduction.

Space High Voltage Power Module Design

2020 ◽  
Author(s):  
Zhao Wen-jie ◽  
Wan Cheng-an ◽  
Gao Yi-fei ◽  
Zhang Guo-shuai ◽  
Zheng Yan ◽  
...  
Keyword(s):  
High Voltage ◽  
Power Module ◽  
Module Design

Reduced Order Design Optimization of Liquid Cooled Heat Sinks

2021 ◽  
Vol 143 (4) ◽  
Author(s):  
Aniket Ajay Lad ◽  
Kai A. James ◽  
William P. King ◽  
Nenad Miljkovic
Keyword(s):  
Design Optimization ◽  
Power Density ◽  
Building Blocks ◽  
Optimization Methods ◽  
Population Based ◽  
Global Optimum ◽  
Heat Sinks ◽  
Geometrical Parameters ◽  
Power Module ◽  
Reduced Order

Abstract The recent growth in electronics power density has created a significant need for effective thermal management solutions. Liquid-cooled heat sinks or cold plates are typically used to achieve high volumetric power density cooling. A natural tradeoff exists between the thermal and hydraulic performance of a cold plate, creating an opportunity for design optimization. Current design optimization methods rely on computationally expensive and time consuming computational fluid dynamics (CFD) simulations. Here, we develop a rapid design optimization tool for liquid cooled heat sinks based on reduced-order models for the thermal-hydraulic behavior. Flow layout is expressed as a combination of simple building blocks on a divided coarse grid. The flow layout and geometrical parameters are incorporated to optimize designs that can effectively address heterogeneous cooling requirements within electronics packages. We demonstrate that the use of population-based searches for optimal layout selection, while not ensuring a global optimum solution, can provide optimal or near-optimal results for most of the test cases studied. The approach is shown to generate optimal designs within a timescale of 60–120 s. A case study based on cooling of a commercial silicon carbide (SiC) electronics power module is used to demonstrate the application of the developed tool and is shown to improve the performance as compared to an aggressive state-of-the-art single-phase liquid cooling solution by reducing the SiC junction-to-coolant thermal resistance by 25% for the same pressure drop.

Performance and Reliability Characteristics of 1200 V, 100 A, 200°C Half-Bridge SiC MOSFET-JBS Diode Power Modules

2010 ◽  
Vol 2010 (HITEC) ◽  
pp. 000289-000296 ◽  
Author(s):  
James D. Scofield ◽  
J. Neil Merrett ◽  
James Richmond ◽  
Anant Agarwal ◽  
Scott Leslie
Keyword(s):  
Selection Process ◽  
Free Module ◽  
Junction Temperature ◽  
Thermal Impedance ◽  
Power Module ◽  
Package Design ◽  
Module Design ◽  
Reliability Characteristics ◽  
Power Modules ◽  
Environmental Requirement

A custom multi-chip power module packaging was designed to exploit the electrical and thermal performance potential of silicon carbide MOSFETs and JBS diodes. The dual thermo-mechanical package design was based on an aggressive 200°C ambient environmental requirement and 1200 V blocking and 100 A conduction ratings. A novel baseplate-free module design minimizes thermal impedance and the associated device junction temperature rise. In addition, the design incorporates a free-floating substrate configuration to minimize thermal expansion coefficient induced stresses between the substrate and case. Details of the module design and materials selection process will be discussed in addition to highlighting deficiencies in current packaging materials technologies when attempting to achieve high thermal cycle life reliability over an extended temperature range.

Reliability analysis of bonding wire based on stacked substrate packaging structure

2019 ◽  
Vol 2019 (1) ◽  
pp. 000603-000608
Author(s):  
Chi Zhang ◽  
Yifan Tan ◽  
Zhizhao Huang ◽  
Cai Chen ◽  
Yong Kang
Keyword(s):  
Thermal Cycling ◽  
Layer Thickness ◽  
Peak Height ◽  
Analytical Models ◽  
Bonding Wire ◽  
Module Design ◽  
Fast Switching ◽  
Calculation Results ◽  
Bonding Wires ◽  
Packaging Structure

Abstract The stacked substrate packaging technology is a new 3D power loop structure utilizing multiple layer DBC to achieve ultra-low parasitic for the fast switching SiC device. This structure has a different geometry on interconnection between chips and substrate contrasting to the conventional module design, which needs optimization on the interconnection for the reliability consideration of this new structure. Analytical models of different bonding wire shapes and DBC structures were developed to calculate the von-mise stress on each model under thermal cycling simulation. The simulation results show that the stress on bonding wire reaches minimum when welding point located at the center of the top DBC substrate and the stress decreases when DBC top copper layer thickness increases or ceramic layer thickness decreases. Moreover, bonding wires with smaller diameter, certain peak height and width show lower stress and strain. Furthermore, thermal cycling tests were done on samples with same geometries of analytical models, and the wire pull test results showed consistency with the stress calculation results which verifying the optimum wire shape and DBC structure for the stacked substrate packaging.

Comparison of Thermal and Stress Analysis Results for a High Voltage Module Using FEA and a Quick Parametric Analysis Tool

2018 ◽  
Author(s):  
L. M. Boteler ◽  
S. M. Miner
Keyword(s):  
Stress Analysis ◽  
High Voltage ◽  
Parametric Analysis ◽  
Thermal Stresses ◽  
Analysis Tool ◽  
Element Analysis ◽  
Module Design ◽  
Fast Running ◽  
Packaging Structure ◽  
Low Order

A low order fast running parametric analysis tool, ParaPower, was used to arrive at the design for a novel high voltage module. The low order model used a 3D nodal network to calculate device temperatures and thermal stresses. The model assumed heat flux generated near the top surface of each device which is then conducted through the packaging structure and removed by convection. The temperature distribution is used to calculate thermal stresses throughout the package. This co-design modeling tool, developed for rectilinear geometries, allowed a rapid evaluation of the package temperatures and CTE induced stresses throughout the design space. However, once the final design configuration was determined a detailed finite element analysis was performed to validate the design. This paper compares the results obtained using ParaPower to the FEA, demonstrating the usefulness of the parametric analysis tool. Results for both temperature and CTE induced stress are compared. Two different stress models are evaluated. One based on the more traditional planar module design, which assumes a substantial substrate or heat spreader on which the module is assembled. The other model is less restrictive, eliminating the requirement for a substrate. The FEA modeling was performed using SolidWorks beginning with a thermal analysis followed by a stress analysis based on the temperature solution. Both the values and the trends of the temperatures and stresses were evaluated. The temperature results agreed to within 3.2°C. The trends and sign of the stresses were correctly predicted, but the magnitudes were not. One of the significant advantages of ParaPower is the speed of the computation. The run time for the parametric analysis was roughly two orders of magnitude faster than the FEA. This made it possible to build the model and complete the parametric analysis of roughly 500 runs in less than a day.

A Review of Temperature Reduction Methods in Codes and Standards for Pipe Supports

2020 ◽  
Author(s):  
Alex Mayes ◽  
Phillip Wiseman ◽  
Kshitij P. Gawande
Keyword(s):  
Heat Transfer ◽  
Computational Models ◽  
Thermal Stresses ◽  
Geometrical Parameters ◽  
Atmospheric Conditions ◽  
Closed Form Solutions ◽  
Temperature Reduction ◽  
Reduction Methods ◽  
American Society ◽  
Transient Thermal

Abstract American Society of Mechanical Engineers (ASME) Boiler and Pressure Vessel Code, Section III, Division 1, Subsection NF, Subparagraph NF-3121.11 does not require that thermal stresses in supports be evaluated. Historically, pipe support engineers have not been concerned with thermal stresses of pipe and component supports, but determining material temperature limits and allowable stresses have been a major role in designing and analyzing supports. Thus, heat transfer is often investigated in finding the temperature of pipe supports and parts of pipe supports that are not in direct contact with pipe or pipe components. There are also other Codes and standards that permit a reduction of temperature away from the outer surface of pipe or pipe components. In some but not all cases, Codes and standards explicitly address reduction of temperature for applications of utilizing thermal insulation. Additionally, the temperature distribution is established by specific geometrical parameters and their respective equations for employment by the pipe support engineer. These reductions are explored by utilizing fundamentals of heat transfer. Additionally, steady-state and transient thermal Finite Element Analyses (FEA) are used to establish computational models of simple geometric bodies in a range of atmospheric conditions. The effects of insulation on the thermal distribution are also represented through closed form solutions and FEA. The results of these analyses allow for assessment of, and recommendations for, the treatment of temperature reduction in Codes and standards.

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