High Reliability Solder Resist with Strong Adhesion and High Resolution for High Density Packaging

2019 ◽  
Author(s):  
Sawako Shimada ◽  
Kazuya Okada ◽  
Tomoya Kudo ◽  
Chiho Ueta ◽  
Yuya Suzuki
Keyword(s):  
High Resolution ◽  
High Reliability ◽  
High Density ◽  
Strong Adhesion ◽  
High Density Packaging

Flexible Circuit Board Package Embedded With Multi-Stack Dies

2020 ◽  
Author(s):  
Nobuki Ueta ◽  
Shunsuke Sato ◽  
Masakazu Sato ◽  
Yoshio Nakao ◽  
Joshua Magnuson ◽  
...  
Keyword(s):  
Hearing Aids ◽  
High Reliability ◽  
Polyimide Film ◽  
High Density ◽  
Circuit Board ◽  
Electrical Measurements ◽  
Test Vehicle ◽  
One Step ◽  
Lamination Process ◽  
High Density Packaging

Abstract Miniaturization of electronics modules is always required for various medical applications including wearable technology, such as hearing aids, and implantable devices. Many types of high-density packaging technologies, such as package-on-package, bare-die stack, flex folded package and Through Si Via (TSV) technologies, have been proposed and used to fulfill the request. Among them, embedded die technology is one of the promising technologies to realize miniaturization and high-density packaging. We have developed WABE™ (wafer and board level device embedded) technology for embedding dies into multilayer flexible printed circuit (FPC) boards. The WABE package is comprised of thin dies (85 μm thickness), multi-layer polyimide, adhesive films and conductive paste. The dies are sandwiched by polyimide films with Cu circuits (FPCs). The conductive paste provides electrical connections between the layers as well as the layer and embedded die. First, each FPC layer is fabricated individually, and via holes are filled with conductive paste, and the dies are mounted on certain layers. Then, all layers undergo a one-step co-lamination process, and they are pressed to cure the adhesive material and conductive paste at the same time. This WABE technology has enabled multiple dies to be embedded by the one-step lamination process. Even if multiple dies are embedded, the footprint of a package can be reduced drastically by embedding multiple dies vertically in stacks. This paper describes the details of the results of fabricating a test vehicle with six embedded dies (three-dies in two stacks side-by-side). The fabricated test vehicle had 14 copper layers with less than 0.9 mm thickness. This paper also reports the results of various reliability testing on the package. These results were obtained by electrical measurements of daisy chain patterns formed between some of the layers. The fabricated test vehicle showed high reliability based on the results of a moisture and heat test and heat-shock test. These results show that the WABE technology to embed multiple dies vertically in polyimide film is one of the most promising packaging technologies to significantly miniaturize electronic circuits such as medical electronics.

Development of High Reliability Via on IVH (VONI) for High Density Interconnect Circuit Boards

2007 ◽  
Vol 4 (2) ◽  
pp. 78-85
Author(s):  
Jong-Won Park ◽  
Yun-Seok Hwang ◽  
Il-Kyoon Jeun ◽  
Da-Hee Joung ◽  
Myung-Gun Chong ◽  
...  
Keyword(s):  
Water Adsorption ◽  
High Reliability ◽  
Chemical Properties ◽  
High Density ◽  
Circuit Boards ◽  
Shock Testing ◽  
Via Holes ◽  
Via Hole ◽  
The Relationship ◽  
High Density Packaging

Via on interstitial via hole (VONI) technique is a complex set of technologies for blind and buried vias in traditional sequential lamination cycles with external layers, and micro via holes (MVH) for true high-density packaging. However, when VONI is repeatedly subjected to thermal stress, the interstitial via hole (IVH) in its structure often creates problems such as IVH barrel cracks, and layer-layer delamination. To solve VONI's reliability problems, such as IVH barrel crack and layer-layer delamination, the authors have investigated the relationship between the CTE difference and the effect of moisture. Through using different types of plugging inks, it was clearly indicated that delamination was related to the chemical properties of the plugging inks. For example delamination was dominated by the inks property of water adsorption, which induced vapor pressure when it undergoes thermal shock testing. The authors have solved the delamination problem by reducing the ratio of water adsorption in the plugging ink.

3-D High-Density Strain Mapping Procedure Based on High-Resolution CT

2007 ◽  
Vol 539-543 ◽  
pp. 2377-2382 ◽  
Author(s):  
Masakazu Kobayashi ◽  
Hiroyuki Toda ◽  
Tomomi Ohgaki ◽  
Kentaro Uesugi ◽  
David S. Wilkinson ◽  
...  
Keyword(s):  
High Resolution ◽  
Local Strain ◽  
High Ratio ◽  
High Density ◽  
Strain Mapping ◽  
Mapping Procedure ◽  
Model Method ◽  
Model Sample ◽  
Alumina Particles ◽  
X Ray Computed

A tracking procedure for the high-resolution X-ray computed tomography (CT) has been developed in order to measure 3-D local strain within a deforming material in high-density. A dispersion-strengthened copper alloy model sample with alumina particles, which contains micropores, was visualized by the synchrotron radiation CT. The pores observed in reconstructed CT volumes were used as tracking markers. The developed tracking method using a set of matching parameters, which classifies matched, pended and rejected markers, exhibited high ratio of success tracking. Furthermore, the ratio was improved by applying the spring model method, which is one of the particle image velocity (PIV) methods utilized in the field of the fluid mechanics, to the pended markers. The method based on the image analysis of CT imaging volumes provides us 3-D high-density strain mapping.

Diagram of Electromigration Pattern in Eutectic Pb-Sn and Pb-Free Solders

2005 ◽  
Vol 297-300 ◽  
pp. 837-843
Author(s):  
Takashi Hasegawa ◽  
Masumi Saka
Keyword(s):  
Current Density ◽  
Solder Bump ◽  
High Density ◽  
Solder Bumps ◽  
Multi Phase ◽  
High Density Packaging

Solder is the most frequently used alloy, which serves as the bonding metal for electronics components. Recently, the interconnected bump is distinctly downsizing its bulk along with the integration of high-density packaging. The evaluation of electromigration damage for solder bumps is indispensable. Hence, it is fairly urgent to understand the mechanism of the electromigration damage to be capable of securing reliability of the solder bump and ultimately predicting its failure lifetime. Electromigration pattern in multi-phase material is determined by the combination of current density, temperature and current-applying time. In this paper, diagram of electromigration pattern (DEP) in solders is presented, where both of eutectic Pb-Sn and Pb-free solders are treated. DEP gives the basis for discussing and predicting the electromigration damage in solders.

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