A Gate Dielectric Last Approach to Integrate Organic Based Devices on Plastic Substrates

ABSTRACTInverters made of monolithically integrated p- and n-channel thin film transistors of nanocrystalline silicon were demonstrated on both Corning 1737 glass and Kapton E polyimide substrates. The TFT's geometry is staggered top-gate, bottom-source/rain. A nc-Si:H seed layer promotes the structural evolution of the nc-Si:H channel. Electron field-effect mobilities of 15 - 30 cm2V−1s-1 and hole mobilities of 0.15 - 0.35 cm2V−1s−1 were obtained. Slightly lower carrier mobilities were observed in the TFTs made on polyimide than on glass substrates. High gate leakage currents and offsets between the supply HIGH voltages and the output voltages in the inverters indicate that the low-temperature gate dielectric needs improvement.

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Low Temperature PECVD Silicon Oxide For Devices And Circuits On Flexible Substrates

MRS Proceedings ◽

10.1557/proc-769-h6.6 ◽

2003 ◽

Vol 769 ◽

Cited By ~ 12

Author(s):

Mark Meitine ◽

Andrei Sazonov

Keyword(s):

Low Temperature ◽

Electronic Properties ◽

Silicon Oxide ◽

Gate Dielectric ◽

Dielectric Breakdown ◽

Mos Capacitors ◽

Plastic Substrates ◽

Temperature Oxide ◽

Stress Uniformity ◽

Deposited Films

AbstractThe aim of this research is to develop low temperature gate dielectric/passivation layer for μc-Si and poly-Si based devices and circuits compatible with plastic substrates.The PECVD silicon oxide films were fabricated from mixture of silane and nitrous oxide at 250 °C, 120 °C and 75 °C. Helium, argon and nitrogen were used as diluent gases to optimize density, stress, uniformity, and electronic properties.Chemical composition and bonding in the films were studied by FTIR spectroscopy. The absorption peak at 1075-1080 cm-1 observed in the spectrum of each film corresponds to SiO2 stretching mode. No presence of SiH stretching or NH-stretching vibrations was found in the FTIR spectra of the samples.Film uniformity was varied from 1.44 % to 5.60 % for 3“×3” area. Four wafers were processed at the same time. The deposited films have compressive stress varied from 0.063 GPa to 0.117 GPa. Respective film density is in the range from 1.63 g/cm3 to 1.77 g/cm3.The electronic properties were studied on MOS capacitors with 200 nm thick SiOx. The dielectric permittivity was in the range between 2.03 and 3.57. The dielectric breakdown at 9 MV/cm was observed for the films deposited at 120 °C. The films deposited at higher temperatures are characterized by lower leakage current density, which was 3.7.10-10 A/cm2 for the sample deposited at 250 °C, 9.10-9 A/cm2 for 120 °C, and 2.2.10-8 A/cm2 for 75 °C at 5 MV/cm.The a-Si:H based TFTs were fabricated using low temperature oxide as gate dielectric. TFTs demonstrate threshold voltage (3.02 – 4.12 V) and mobility (0.12 – 0.59 cm2/Vs) comparing with those using silicon nitride.

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High-Mobility 6,13-Bis(triisopropylsilylethynyl) Pentacene Transistors Using Solution-Processed Polysilsesquioxane Gate Dielectric Layers

Journal of Nanoscience and Nanotechnology ◽

10.1166/jnn.2016.12293 ◽

2016 ◽

Vol 16 (4) ◽

pp. 3273-3276 ◽

Cited By ~ 3

Author(s):

Yu Matsuda ◽

Yoshio Nakahara ◽

Daisuke Michiura ◽

Kazuyuki Uno ◽

Ichiro Tanaka

Keyword(s):

Thin Film Transistors ◽

Gate Dielectric ◽

Dielectric Material ◽

Low Cost ◽

High Mobility ◽

Hole Mobility ◽

Plastic Substrates ◽

Active Layers ◽

Dielectric Layers ◽

Gate Dielectric Material

Polysilsesquioxane (PSQ) is a low-temperature curable polymer that is compatible with low-cost plastic substrates. We cured PSQ gate dielectric layers by irradiation with ultraviolet light at ~60 °C, and used them for 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) thin film transistors (TFTs). The fabricated TFTs have shown the maximum and average hole mobility of 1.3 and 0.78±0.3 cm2V−1s−1, which are comparable to those of the previously reported transistors using singlecrystalline TIPS-pentacene micro-ribbons for their active layers and thermally oxidized SiO2 for their gate dielectric layers. It is therefore demonstrated that PSQ is a promising polymer gate dielectric material for low-cost organic TFTs.

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Fabrication of a-Si:H Tfts at 120°C on Flexible Polyimide Substrates

MRS Proceedings ◽

10.1557/proc-558-375 ◽

1999 ◽

Vol 558 ◽

Cited By ~ 7

Author(s):

Andrei Sazonov ◽

Arokia Nathan ◽

R.V.R. Murthy ◽

S.G. Chamberlain

Keyword(s):

Thin Film ◽

Gate Dielectric ◽

Low Cost ◽

Thin Film Transistor ◽

Performance Comparison ◽

Hydrogen Gas ◽

Large Area ◽

Plastic Substrates ◽

Glass Substrates ◽

Contact Metallization

ABSTRACTThe fabrication of large-area thin-film transistor (TFT) arrays on thin flexible plastic substrates requires deposition of thin film layers at relatively low temperatures since the upper working temperature of low-cost plastic films should not exceed ∼200°C. In this paper, we report a fabrication process of a-Si:H TFTs at 120°C on flexible polyimide substrates for large-area imaging applications.Kapton HN (DuPont) films 50 and 125 μm thick and 3 inches in diameter, were used as substrates. Both sides of the polyimide substrate were first covered with 0.5 μm thick a-SiNx. The TFT structure includes: 120 nm thick room-temperature sputtered Al gate, 250 nm thick PECVD deposited a-SiNx for the gate dielectric, 50 nm thick a-Si:H deposited by PECVD from silane-hydrogen gas mixture, 50 nm thick n+ a-Si:H source- and drain contacts, and roomtemperature sputtered Al top contact metallization. We used dry etching for all layers except for the gate and top metal, which were patterned using wet etchants. For purpose of TFT performance comparison, Coming 7059 glass substrates were used.The performance of the fabricated TFT and its improvement with use of optimized a-Si:H and a-SiNx quality will be presented along with a discussion of the intrinsic mechanical stress in the thin film layers will also be discussed.

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Low-temperature processable inherently photosensitive polyimide gate dielectric for organic thin-film transistors: Synthesis, characterization, and application to transistors

Journal of Materials Research ◽

10.1557/jmr.2005.0121 ◽

2005 ◽

Vol 20 (4) ◽

pp. 931-939 ◽

Cited By ~ 7

Author(s):

Seungmoon Pyo ◽

Hyunsam Son ◽

Mi Hye Yi

Keyword(s):

Thin Film ◽

Low Temperature ◽

Thin Film Transistors ◽

Gate Dielectric ◽

Low Cost ◽

Polyimide Film ◽

Organic Thin Film Transistors ◽

Organic Thin Film ◽

Aromatic Diamines ◽

Plastic Substrates

Low-temperature processable inherently photosensitive polyimide was prepared from a dianhydride, 3,3′,4,4′-benzophenone tetracarboxylic dianhydride, and aromatic diamines, 4,4′-diamino-3,3′dimethyl-diphenylmethane, through a polycondensation reaction, followed by a chemical imidization method. The photosensitive polyimide cured at 180 °C is used as a gate dielectric to fabricate flexible organic thin-film transistors with pentacene as an active semiconductor on polyethersulfone substrate. With the inherently photosensitive polyimide, the access to the gate electrode could be created easily without complicated and expensive lithographic techniques. A field effect carrier mobility of 0.007 cm2/V s was obtained for the pentacene organic thin-film transistors (OTFTs) with the photo-patterned polyimide as a gate dielectric. More detailed analysis for the pentacene OTFTs will be given with electrical properties of the thin polyimide film. Low-temperature processability and patternability of the polyimide give us more freedom to choose plastic substrates in OTFTs and facilitate the realization of low-cost organic electronics.

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Hot-Wire Deposited Nanocrystalline Silicon TFTs on Plastic Substrates

MRS Proceedings ◽

10.1557/proc-0989-a20-04 ◽

2007 ◽

Vol 989 ◽

Cited By ~ 2

Author(s):

Farhad Taghibakhsh ◽

Michael M. Adachi ◽

Karim S. Karim

Keyword(s):

Vapor Deposition ◽

Thermal Damage ◽

Gate Dielectric ◽

Chemical Vapor ◽

Nanocrystalline Silicon ◽

Field Effect Mobility ◽

Hot Wire ◽

Current Ratio ◽

Plastic Substrates ◽

Electron Field

AbstractHot-wire chemical vapor deposition (HWCVD) technique was used to deposit nanocrystalline silicon (nc-Si) thin film transistors (TFT) on thin polyimide sheets. Two straight tantalum filaments at 1850°C with a substrate to filament distance of 4 cm was used to deposit HWCVD nc-Si with no thermal damage to plastic sheet. Top-gate staggered TFTs were fabricated at 150°C and 250°C using a HWCVD nc-Si channel, PECVD silicon nitride gate dielectric, and microcrystalline n+ drain/source contacts. Leakage current of 3.3×10-12 A, switching current ratio of 3×106, and sub threshold swing of 0.51 V/decade were obtained for TFTs with aspect ratio of 1400 µm / 100 µm fabricated at 150°C. The highest electron field effect mobility was found to be 0.3 cm2/V.s observed for TFTs deposited at lower substrate temperature. Measurements showed superior threshold voltage stability of HW nc-Si TFTs over their amorphous silicon (a-Si) counterparts.

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Single-crystalline silicon nanomembrane thin-film transistors with anodized aluminum oxide as gate dielectric on rigid and flexible substrates

Journal of Physics D Applied Physics ◽

10.1088/1361-6463/ac453c ◽

2021 ◽

Author(s):

Xiaodong Yang ◽

Bowen Geng ◽

Junqing Wei ◽

Zhi Wang ◽

Kuibo Lan ◽

...

Keyword(s):

High Performance ◽

Room Temperature ◽

Gate Dielectric ◽

Crystalline Silicon ◽

Low Cost ◽

Anodized Aluminum ◽

Anodized Aluminum Oxide ◽

Single Crystalline ◽

Plastic Substrates ◽

Silicon Nanomembrane

Abstract Flexible integrated circuits (ICs) have gained a lot of attentions in recent years for their emerging application in wearable electronics. Flexible thin-film transistors (TFTs) with low-cost and high-performance are highly desirable as essential and fundamental element for most of the flexible applications. In this paper, we fabricated single-crystalline silicon nanomembrane (SiNM) based TFTs with anodized aluminum oxide (AAO) as dielectric material on glass and flexible plastic substrates. Good quality AAO was obtained on plastic substrates at room temperature. AFM was used for surface morphology of AAO gate dielectric layers on different substrates (i.e. glass, polyethylene terephthalate (PET) and SU-8 coated PET). The electrical characteristics of the AAO gate dielectric layers on different substrates were also analyzed with metal- dielectric-metal (MIM) capacitors. SiNMs were processed with complementary metal oxide semiconductor (CMOS) compatible semiconductor process (e.g. photolithography, ion implantation, thermal annealing, reactive ion etching, metal evaporation, etc.), and then transferred to the substrates with AAO/aluminum stack layers. Performances of transistors on glass and plastic substrates were characterized. Compared with the TFT fabricated on glass substrate, TFT fabricated directly on a PET substrate have lower performance due to poor surface roughness. For optimization of the surface roughness, PET was modified with coating SU-8 photoresist. By this way, TFT had properties close to that on glass substrate. AAO that can be manufactured at room temperature provides a simple and low-cost solution for high-performance flexible single-crystalline SiNM TFTs.

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Poly-Si TFTs From Glass to Plastic Substrates: Process and Manufacturing Challenges

MRS Proceedings ◽

10.1557/proc-814-i1.6 ◽

2004 ◽

Vol 814 ◽

Cited By ~ 2

Author(s):

F. Lemmi ◽

S. Lin ◽

B.C. Drews ◽

A. Hua ◽

J.R. Stern ◽

...

Keyword(s):

Low Temperature ◽

Laser Annealing ◽

Gate Dielectric ◽

Film Stress ◽

Superior Performance ◽

Excimer Laser Annealing ◽

Active Matrix ◽

Plastic Substrates ◽

Active Matrix Displays ◽

Automated Tools

AbstractPoly-Si Thin-Film Transistors (TFTs) are currently used in commercial active-matrix displays. They provide superior performance with respect to their amorphous silicon counterparts and allow integration of driving electronics directly on the display glass plates.For several applications, it can be desirable to have active-matrix displays made on flexible substrates. However, a direct application of a standard TFT process to plastic substrates is not in general possible, mostly because of temperature limits and related dimensional stability issues. In addition, standard flat-panel manufacturing tools are not capable of automatically handling non-rigid floppy substrates.Therefore, a new process has to be developed, compatible with a suitable way of handling plastic substrates. A process was developed in which plastic sheets are laminated on glass carrier wafers and run through all the automated tools. A low-temperature process using excimer laser annealing is developed and optimized. High-quality TFT backplanes are manufactured with a pixel layout designed for active-matrix OLED (AMOLED) displays. Field-effect mobility in excess of 70 cm2Vs on p-channel TFTs are achieved, together with leakage currents lower than 2 pA per micron gate width.Challenges include low-temperature gate dielectric development, reduction of intrinsic film stress, protection of plastic from laser damage, and contact formation. Solutions to these challenges are discussed and TFT transfer characteristics on glass and plastic substrates are presented. Finally, images from prototype monochrome AMOLED displays are presented, with 64 × 64 pixels and 80-dpi resolution.

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